A disk drive controller having a plurality of directors, each one of the directors able to control the flow of data therethrough and being responsive to external clock signals to synchronize its internal clock timing comprising:
- a master bus and a secondary bus, each said bus being connected to each said director;
- and
- each said director having:
- circuitry for monitoring the occurrence of clock pulses over said buses;
- a counter responsive to each received clock pulse for incrementing its count;
- a hardware circuitry, coupled to the monitoring circuitry and to the counter, for identifying a first low threshold failure of clock pulses on the master bus and for effecting a synchronization event in response thereto wherein the counter is reset;
- a macrocode processor, coupled to the hardware circuitry, for deciding whether to cause said director to switch to the secondary bus for receiving clock pulses;
- and
- switching circuitry, coupled to the macrocode processor, for switching said director from the master bus to the secondary bus for the receipt of clock pulses upon the occurrence of a failure of clock pulses over said master bus.