System and method for verification of off-chip processor code

An electronic system comprising:

• a first substrate;
• and
• a processing unit coupled to the first substrate, the processing unit including
• a second substrate,
• a processor placed on the second substrate comprises a first secret key, a second secret key, and a pre-computed message authentication code (MAC) value, and
• an on-substrate memory element coupled to the processor and placed on the second substrate, the on-substrate memory element containing Processor Abstract Layer (PAL) code having its integrity verified by the processor before execution of the PAL code and prior to releasing the processor from a RESET state.

A method comprising:

• loading code from a memory element to a local memory of a processor, the memory element is remotely situated from the processor;
• performing a cyclic redundancy check message authentication code (CRC MAC) function on the code to produce a computed MAC value;
• comparing the computed MAC value to a pre-computed MAC value prestored in the local memory of the processor;
• and
• allowing the processor to execute the code if the computed MAC value matches the precomputed MAC value.