Flash memory having data blocks, spare blocks, a map block and a header block and a method for controlling the same
AssigneeSamsung Electronics Co., Ltd.
InventorBum Soo Kim
Life of this patent
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AssigneeSamsung Electronics Co., Ltd.
InventorBum Soo Kim
Estimating the term…
A flash memory and a method for controlling the same are disclosed. The flash memory has units, each of which includes a plurality of data blocks for writing data; a plurality of spare blocks emptied for writing updated data of the data blocks; a map block for designating an actual location in which data is written; and a header block for recording flash memory information and unit information. The method, in the case of updating data of a data block, first writes update data into an empty spare block in the same unit, updates mapping information of the map block, and updates state information of a previous block, so that a user can have access to data by using the same address and there is no need of deleting a unit every time the block is updated. Therefore, the present invention enhances an efficiency of writing and updating data while reducing the number of delete times.
A method for controlling a flash memory having units wherein each of the units includes a plurality of data blocks for writing data, a plurality of spare blocks emptied for writing updated data of the data blocks, a map block for designating an actual location in which data is written with respect to a logical block number, and a header block for recording flash memory information and unit information, the method comprising steps of:
A method for controlling a flash memory having units wherein each of the units includes a plurality of data blocks for writing data, a plurality of spare blocks emptied for writing updated data of the data blocks, a map block for designating an actual location in which data is written, and a header block for recording flash memory information and unit information, the method comprising steps of:
A method for controlling a flash memory having units wherein each of the units includes a plurality of data blocks for writing data, a plurality of spare blocks emptied for writing updated data of the data blocks, a map block for designating an actual location in which data is written, and a header block for recording flash memory information and unit information, the method comprising steps of:
A method for controlling a flash memory having units wherein each of the units includes a plurality of data blocks for writing data, a plurality of spare blocks emptied for writing updated data of the data blocks, a map block for designating an actual location in which data is written, and a header block for recording flash memory information and unit information, the method comprising steps of:
A method for controlling a flash memory having units wherein each of the units includes a plurality of data blocks for writing data, a plurality of spare blocks emptied for writing updated data of the data blocks, a map block for designating an actual location in which data is written, and a header block for recording flash memory information and unit information, the method comprising steps of:
A method for controlling a flash memory having units wherein each of the units includes a plurality of data blocks for writing data, a plurality of spare blocks emptied for writing updated data of the data blocks, a map block for designating an actual location in which data is written, and a header block for recording flash memory information and unit information, the method comprising steps of:
A method for controlling a flash memory having units wherein each of the units includes a plurality of data blocks for writing data, a plurality of spare blocks emptied for writing updated data of the data blocks, a map block for designating an actual location in which data is written, and a header block for recording flash memory information and unit information, the method comprising steps of:
An apparatus for controlling a flash memory having units wherein each of the units includes a plurality of data blocks for writing data, a plurality of spare blocks emptied for writing updated data of the data blocks, a map block for designating an actual location in which data is written with respect to a logical block number, and a header block for recording flash memory information and unit information, the apparatus comprising:
Dependencies are inferred from the claim text.