Apparatus for detecting data collision on data bus for out-of-order memory accesses with access execution time based in part on characterization data specific to memory

An apparatus for reordering commands to achieve an optimal command sequence based on a target response restriction that determines an optimal slot for a data transfer between an initiator controller and a target subsystem by prohibiting an issuance of a command that would cause a data conflict, comprising:

• at a command queue,
• a means for storing a command to be issued,
• a means for storing a time indicating when the data transfer appears on a data bus between the controller and the target device after the command was issued to the target,
• a means for storing a burst-bit indicating data burst transfer and a read/write bit (r/w);
• in a data queue coupled to the command queue,
• a means for storing a time indicating when the data transfer will appear on the data bus between the controller for an already issued request to the target device, and
• a means for storing the burst bit and the read/write bit (r/w);
• at a collision detector coupled to the data queue and the command queue,
• a means for detecting the possible collisions on the data bus between the issued command that is stored in the command queue and already issued commands that are stored in the data queue;
• a means for storing target subsystem characterization data at a target subsystem characterization data base;
• and
• at a queues and link controller coupled to the collision detector the data queue and the command queue,
• a means for reordering commands to be issued wherein the controller calculates the new issue time of commands as well as a time when the data appears on the data bus, wherein the new issue time is based at least in part on the target subsystem characterization data, and
• a means for storing the reordered commands.