System and method for high-speed, synchronized data communication

A method for high-speed communication of digital data comprising:

• generating a sender's clock signal and a receiver's clock signal using a system clock signal, where the sender's clock signal is a first integer multiple of the system clock signal, and the receiver's clock signal is a second integer multiple of the sender's clock signal;
• receiving the digital data;
• encoding the digital data to generate encoded data frames;
• forming an encoded data stream from the encoded data frames;
• transmitting the encoded data stream to a channel in synchronization with the sender's clock signal.

A method for high-speed communication of digital data comprising:

• generating a sender's clock signal and a receiver's clock signal using a system clock signal, where the sender's clock signal is a first integer multiple of the system clock signal, and the receiver's clock signal is a second integer multiple of the sender's clock signal;
• receiving the encoded data stream from the channel in synchronization with the receiver's clock signal;
• generating encoded data frames from the encoded data stream;
• and
• decoding the encoded data frames to regenerate the digital data.

A method for high-speed reception of digital data comprising:

• receiving a waveform;
• oversampling the waveform to generate an oversampled data stream;
• determining digital data from the oversampled data stream;
• and
• outputting the digital data, where normally two predetermined portions of the digital data are output during each alternate cycle of a system clock signal, where for overflow situations the digital data is output during consecutive cycles of the system clock signal, and where for underflow situations no digital data is output during consecutive cycles of the system clock signal.