Programmable address logic for solid state diode-based memory

A method of programming a decoder of a solid state memory device, the memory device also including programming logic, address elements of the decoder being connected in series with programming elements of the programming logic, the method comprising reverse-biasing the address elements;

• forward-biasing the programming elements connected in series with the address elements;
• and irradiating the address elements.

A method of programming a decoder of a solid state memory device, the memory device also including programming logic, address elements of the decoder being connected in series with programming elements of the programming logic, the method comprising reverse-biasing the address elements and forward-biasing the programming elements connected in series with the address elements;

• wherein the device further includes sense logic, the sense logic including a sense line;
• and wherein the sense and programming lines are used to reverse-bias the address elements and forward-bias the programming elements connected in series with the address elements.

A method of programming a decoder of a solid state memory device, the method comprising fabricating first and second groups of address elements of the decoder, the address elements of the first group having been assigned a first logic value, and the address elements of the second group having been assigned a second logic value, the address elements of the first group having different current-carrying capability than the elements of the second group, the elements of the first group being physically larger than the elements of the second group.