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US 6,587,392 B2Granted
Fast accessible dynamic type semiconductor memory device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorTsukasa Ooishi
Life of this patent
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Abstract
Respective ones of a plurality of memory array blocks are rendered drivable independently of each other under control of an array activation control circuit. When data is read from one array block under control of the array activation control circuit, the data can be transferred to another array block by selecting and coupling a column in the other array block to a global I/O bus.
Claims8
A semiconductor memory device comprising:
- a memory array including a plurality of memory cells, arranged in rows and columns, each for storing data sensible by a sense amplifier, the sense amplifier being arranged corresponding to a column of the memory cells;
- and
- a plurality of capacitors, arranged in said memory array separately from the memory cells, each having a first electrode receiving a fixed voltage and maintained at a level of the fixed voltage.
Dependencies are inferred from the claim text.