DRAM refresh command operation
Assignee3Com Corporation
InventorsDenise De Paor, Tadhg Creedon
Life of this patent
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Assignee3Com Corporation
InventorsDenise De Paor, Tadhg Creedon
Estimating the term…
A method and apparatus for refresh command operations on an SDRAM that avoids use of refresh commands requiring all banks of the SDRAM to be idle. Burst operation establishes command sequences that include Nop command intervals. Some of these Nop intervals are used to perform operations on a bank other than the one under access for the burst that provide a refresh. ACTIVE followed by PRECHARGE commands are inserted into the command intervals addressed to a refresh address. The refresh addresses are generated externally of the SDRAM and provided to a multiplexer that sequences them with the data addresses. A secondary timer checks that required refresh has occurred and prioritizes the refresh addresses over data addresses in the multiplexer in the event that a refresh has not been completed shortly before a maximum refresh interval.
A method of refreshing an SDRAM chip having a memory internally configured in a plurality of banks, the method comprising:
Apparatus for generating commands for refreshing an SDRAM that is internally configured in a plurality of banks and operates in burst sequences, the apparatus comprising
Dependencies are inferred from the claim text.