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US 6,587,387 B1Granted
Device and method for testing mask ROM for bitline to bitline isolation leakage
AssigneeMacronix International Co., Ltd.
InventorsTso-Hung Fan, Yen-Hung Yeh, Kwang-Yang Chan, Mu-Yi Liu, Tao-Cheng Lu
Life of this patent
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Abstract
A Mask ROM testing device is described. The Mask ROM testing device comprises a substrate, a plurality of buried bit-lines in the substrate and a plurality of word-lines on the substrate perpendicular to the buried bit-lines. Each buried bit-line has two end portions with a combined length of about 3˜30 μm and can have an N-type conductivity or a P-type conductivity.
Claims12
A Mask ROM testing device for identifying an array leakage path in a Mask ROM, comprising:
- a substrate;
- a plurality of buried bit-lines in the substrate;
- and
- a plurality of word-lines on the substrate perpendicular to the buried bit-lines, wherein
- each buried bit-line has two end portions not covered by the word-lines with a combined length from about 3 μm to about 30 μm.
2 more elements
A method for testing a Mask ROM for identifying an array leakage path in the Mask ROM, comprising:
- providing a testing device comprising a plurality of buried bit-lines in a substrate and a plurality of word-lines on the substrate perpendicular to the buried bit-lines, wherein each buried bit-line has two end portions not covered by the word-lines with a combined length from about 3 μm to about 30 μm;
- and
- applying test biases to the testing device and measuring a total leakage current in the testing device.
Dependencies are inferred from the claim text.