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US 6,587,375 B2Granted
Row decoder for a nonvolatile memory device
AssigneeSamsung Electronics Co., Ltd.
InventorsHwi-Taek Chung, Seung-Keun Lee, Young-Ho Lim
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AssigneeSamsung Electronics Co., Ltd.
InventorsHwi-Taek Chung, Seung-Keun Lee, Young-Ho Lim
Estimating the term…
The invention provides decoder circuits for selecting a word line in a semiconductor memory device which comprises a plurality of memory cell sectors including a plurality of word lines and bit lines and a plurality of memory cells which each is electrically erasable and programmable. The decoder circuits comprise a pull-up and pull-down transistors connected to global word lines which are connected to the word lines via connecting means, the decoder circuits turning on pull-down transistors before a high voltage according to an operation mode is supplied to one selected from the global word lines and pre-charging the gates of the pull-up transistors to the high voltage. The invention enables the decoder circuits to supply the word line drive voltage to the global word lines connected to memory cells by using the self-boosting method to thereby reduce the boosting load.
A semiconductor memory device having electrically erasable and programmable memory cells, comprising:
A semiconductor memory device having electrically erasable and programmable memory cells, comprising:
In a semiconductor memory device comprising a plurality of word lines and bit lines and a plurality of memory cells, the memory cells being electrically erasable and programmable, a circuit for selecting the word lines comprising:
Dependencies are inferred from the claim text.