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US 6,587,373 B2Granted
Multilevel cell memory architecture
AssigneeIntel Corporation
InventorSanjay S. Talreja
Life of this patent
Estimating the term…
Abstract
A multilevel cell memory may use an architecture in which bits from different words are stored in the same multilevel memory cell. This may improve access time because it is not necessary to sense both cells before the word can be outputted. Therefore, the access time may be improved by removing a serial element from the access chain.
Claims4
A system comprising:
- a digital signal processor;
- and
- a memory coupled to said processor including an array of multilevel memory cells, each of said multilevel memory cells to store at least two bits and at least one of said memory cells to store a first bit from a first word and a second bit from a second word.
Dependencies are inferred from the claim text.