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US 6,587,363 B2Granted
High speed data bus
AssigneeMicron Electronics, Inc.
InventorDean A. Klein
Life of this patent
Estimating the term…
Abstract
The invention comprises data processing systems and components thereof. Such systems may include a memory controller, a plurality of memory devices, a data bus coupling the memory controller with the plurality of memory devices, and at least one bus switch located in the data bus between the memory controller and one of the plurality of memory devices. Memory integrated circuits and memory modules including at least one switch in the data bus are also provided.
Claims17
A memory module comprising:
- a printed circuit board;
- at least one electrical contact arranged on said printed circuit board to receive digital data;
- at least one synchronous-DRAM memory integrated circuit attached to said printed circuit board;
- a state decoder for receiving a chip select signal targeted for the synchronous-DRAM memory circuit;
- and
- at least one switch having one or more inputs connected to corresponding ones of said one or more electrical contacts, and one or more outputs connected to said at least one memory integrated circuit, whereby the synchronous-DRAM memory integrated circuit is selectively decoupled from a bus in response to a change in state in the chip select signal.
3 more elements
A memory module comprising:
- a printed circuit board;
- at least one electrical contact arranged on said printed circuit board to receive digital data;
- at least one memory integrated circuit attached to said printed circuit board;
- a state decoder for receiving a chip select signal targeted for the memory circuit;
- and
- at least one switch having one or more inputs connected to corresponding ones of said one or more electrical contacts, and one or more outputs connected to said at least one memory integrated circuit, whereby the memory integrated circuit is selectively decoupled from a bus in response to a change in state in the chip select signal.
3 more elements
A memory module comprising:
- a printed circuit board having a data bus;
- at least one electrical contact arranged on said printed circuit board to receive digital data;
- at least one memory integrated circuit attached to said printed circuit board;
- and
- at least one switch having one or more inputs connected to corresponding ones of said one or more electrical contacts, and one or more outputs connected to said at least one memory integrated circuit, and wherein activation of the switch is operated to control the parasitic capacitance of the bus.
2 more elements
A memory module comprising:
- a printed circuit board comprising a data bus;
- and
- at least one memory integrated circuit attached to said printed circuit board, the memory integrated circuit comprising at least one switch for decoupling the memory integrated circuit from the data bus, and wherein activation of the switch is operated to control the parasitic capacitance of the bus.
A memory module comprising:
- a printed circuit board;
- at least one electrical contact arranged on said printed circuit board to receive digital data;
- a memory controller comprising an address bit decoder configured to selectively enable one or more memory controller outputs in response to received address bits;
- at least one memory integrated circuit attached to said printed circuit board;
- and
- at least one switch in a databus that is resides at least in part in the memory integrated circuit, wherein the switch, the memory integrated circuit, and the memory controller each collectively reside within a single integrated circuit, and wherein activation of the switch is operated to control the parasitic capacitance of the bus.
3 more elements
Dependencies are inferred from the claim text.