Ring topology based voltage controlled oscillator

An integrated circuit having fabricated thereon a voltage controlled oscillator, comprising:

• N series-coupled delay stages, each of said stages providing at least a first delay path and a second delay path and contributing a phase shift at a VCO frequency of interest equal to 180°/N, where N is an integer greater than one;
• for each of said N delay stages, a delay interpolator, coupled to interpolate between said first and said second delay path;
• for each of said N delay stages, a bandpass frequency selective network that rejects phase noise for said VCO;
• and
• a path between a last of said delay stages and a first of said delay stages providing an amount of phase shift selected from 180° and 0°;
• where total phase shift through said VCO is 360° at said VCO frequency of oscillation.

A method of implementing a low phase noise voltage controlled oscillator (VCO), the method comprising the following steps:

• (a) series-coupling N delay stages, each of said stages providing at least a first delay path and a second delay path and contributing a phase shift at a VCO frequency of interest equal to one of 180°/N and 360°/N where N is an integer greater than one;
• (b) for each of said N delay stages, interpolating between said first delay path and said second delay path;
• (c) bandpass filtering each of said N delay stages to reduce phase noise of said VCO;
• and
• (d) coupling an output of a last of said delay stages and a first of said delay stages with a phase shift selected from (i) 180° and (ii) 0°, such that total loop phase shift through said VCO is 360° at said VCO frequency of interest.