Method for preventing damage to IO devices due to over voltage at pin
AssigneeLSI Logic Corporation
InventorRussell E. Radke
Life of this patent
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AssigneeLSI Logic Corporation
InventorRussell E. Radke
Estimating the term…
A circuit which provides that a source voltage and a pad voltage are band-limited and source-followed down in order to get them into the input range of a comparator, the output of which signals an over-voltage condition on the pad. The circuit provides the ability to provide the relationship between the source voltage and pad voltage to a comparator with a very small, tightly-controlled offset. This translates to the ability to detect very small over-voltage conditions on an IO. The circuit consumes little power, is highly accurate, and requires no special, expensive process options. The circuit can be used anywhere there is a desire to compare (with a small, accurate offset) two signals that are close to a source voltage, such as VDD. The circuit can also be used to compare signals close to VSS.
A circuit configured to receive a source voltage and a pad voltage, said circuit comprising:
A method of determining whether an over-voltage condition exists on a pad, comprising:
Dependencies are inferred from the claim text.