Transistor-mismatch-insensitive current comparator cell

#The present invention relates to a method and apparatus for converting current signal to two voltage level conversion through an adaptive thresholding.

#Current comparators are important building blocks in the design of optical signal processing, electronic signal processing and data conversion circuits, In many of the existing analog current comparators, the input current is first converted into a voltage signal. This voltage signal is then compared to a voltage threshold and the output is a two level voltage signal. The current-to-voltage conversion scheme is either performed using a process of charge accumulation or using resistive device. The use of a resistive device may cause serious accuracy problems due to transistor mismatch while the use of charge accumulation requires linear capacitors and introduces delays. For voltage comparators, transistor mismatch is unavoidable causing threshold shifting. Moreover, many voltage comparators are op-amp-based, which may not be silicon-space-efficient.

#Some current detection circuits based on MOS transistor features have been reported in the literature; for instance, the current Schmitt-trigger (Z. Wang and Guggenbühl. “Novel CMOS current Schmitt trigger.” Electronics Letters, vol. 24, No 24, November 1988, pp. 1514-1516), current detectors with feedback structures (H. Träff. “Novel approach to high speed CMOS current comparators,” Electronics Letters, vol. 28, No3, January 1992, pp. 310-312; A. T. K. Tang and C. Toumazou. “High performance CMOS current comparator,” Electronics Letters, vol. 30, No.1, January 1994, pp. 5-6; G. Linàn-Cembrano et al. “A robust high-accuracy high-speed continuous-time CMOS current comparator,” Electronics Letters, vol.33, December 1997, pp.2082-2084.), and switched-current comparators (A. Worapishet et al. “Enhanced switched-current comparator,” Electronics Letters, vol.35, No.10, May 1999, pp. 767-768). These circuits produce a two level output voltage according to the polarity of the input current, instead of performing a current comparison with a specified value of the threshold.

#The invention will be better understood by way of the following detailed description of a preferred embodiment with reference to the appended drawings, in which:

#FIG. 1a is a circuit schematic of an apparatus for converting a current signal into a two voltage level signal.

#FIG. 1b is a graph which shows the output voltage versus the input voltage of three apparatus which are designed identically and each of which converts a current signal into a two level voltage signal with a threshold non-identical to that of the others due to the non-identical physical parameters of the devices employed;

#Now referring to FIG. 1a, there is shown one simple current comparator proposed by Freitas and Current (Freitas and K. Current, “A CMOS current comparator circuit,” Electronics Letters, vol.19, No.17, Aug. 1983, pp. 694-697), the converter converts in a single step and with a pre-determined current threshold a current iIN into a two-level voltage VOUT. The threshold current iTH is set up by applying a voltage VG3 at the gate of the transistor T3 of FIG. 1a. For the sake of clarity, transistor T1 and transistor T2 are considered to be identical. Therefore, transistor T1 and transistor T2 create a basic current source; current i1 is equal to current i2. If the current i1 is equal to current i3, transistors T2 and T3 are in a saturation mode, the output voltage is therefore approximately VDD/2. If the current i1 is larger than iTH, transistor T2 is in the triode mode and transistor T3 is in the saturation mode; the output voltage is set at a low level (VOL). Finally, if the threshold current iTH is larger than the current i1, transistor T2 is in the saturation mode, transistor T3 is in the triode mode; the output voltage is set at a high level (VOH).

#Unfortunately, this comparator does not meet the requirement of an accurate analog low-level current comparison due to the problem of transistor mismatch, i.e. the physical parameters of identically designed transistor devices being different. If identically designed current comparator cells are fabricated in different places on a semiconductor base, the transistor mismatch may cause a deviation in the threshold of the comparison; as the transconductance of transistor T3 is different for each cell. Applying the same voltage VG3 at the gate of transistor T3 results in different threshold currents iTH; Also, the transistor mismatch may cause the current transfer ratio i2/i1 to be significantly different for each cell and the predetermined threshold current is in fact compared to i2 instead of i1, which causes another threshold deviation; furthermore, the ratio i1/iIN may be significantly different as for each cell, the input current source has a resistance RS which may be different from that of the others. All these contribute to a significant discrepancy of comparison threshold. FIG. 1b shows such a discrepancy in the transfer characteristics of three such identically designed cells. It is known that the current mismatch between any two transistors of small geometry may be as much as 20% in the weak inversion region (F. Forti and M. E. Wright. “Measurement of MOS current mismatch in the weak inversion region,” IEEE J. Solid State Circuits, Vol. 29, No, 2, February 1994, pp. 138-142). Taking all factors into consideration. A threshold variation of up to 50% in identically designed current comparator cells may be expected. If the comparator is intended to be used in an A/D converter or in an optical sensor matrix, wherein the threshold must be substantially the same, extra threshold current set-up is necessary,

#Now referring to FIG. 2, there is shown one embodiment of the present invention, according to step 20, the adaptive compensation comprises a set-up step wherein the apparatus is set-up. In the preferred embodiment of the present invention, the switch K is closed during the set-up step. According to step 22, the configuration performed during the set-up step 20 is memorized. According to step 24, a current to be compared to a threshold current value is applied. In the preferred embodiment of the present invention, the switch K is opened when a current to be compared is applied. According to step 26, an output is generated according to the comparison results.