Adapting VLSI clocking to short term voltage transients
AssigneeHewlett-Packard Development Company, L.P.
InventorsSamuel Naffziger, Eric S. Fetzer
Life of this patent
Estimating the term…
Abstract
A system and method of compensating for voltage droop in an integrated circuit. The integrated circuit may include a plurality of chip circuits, a clock control system, a clock distribution network including at least one delay element and a voltage droop detector. The clock control system adapts cycle time in the clock distribution network through use of the at least one delay element when a voltage droop is detected. The method may include detecting a voltage droop in an integrated circuit where the integrated circuit is driven by a clock signal, determining an optimum frequency change to compensate for the voltage droop, and adapting cycle time of the clock signal in an incremental manner to achieve the optimum frequency change.
Claims23
A method of compensating for voltage droop in an integrated circuit comprising:
- detecting a voltage droop in an integrated circuit, the integrated circuit being driven by a clock signal;
- determining an optimum frequency change to compensate for the voltage droop;
- and
- adapting cycle time of the clock signal in an incremental manner to achieve the optimum frequency change, wherein adapting the cycle time comprises increasing the cycle time by a determined value for a designated number of cycles.
An integrated circuit having voltage droop compensation capability comprising:
- a plurality of chip circuits;
- a clock control system;
- a clock distribution network including at least one delay element;
- and
- a voltage droop detector, wherein the clock control system adapts cycle time of the clock signal through use of the at least one delay element when a voltage droop is detected by the voltage droop detector.
A method of compensating for voltage droop in an integrated circuit comprising:
- detecting a voltage droop in an integrated circuit, the integrated circuit being driven by a clock signal;
- and
- increasing a cycle time of the clock signal for a number of clock cycles in response to detecting the voltage droop.
A system comprising:
- means for detecting a voltage droop in an integrated circuit, the integrated circuit being driven by a clock signal;
- and
- means for increasing a cycle time of the clock signal for a number of clock cycles in response to detecting the voltage droop.
Dependencies are inferred from the claim text.