Dual chip in package with a wire bonded die mounted to a substrate

A semiconductor package comprising:

• a packaging substrate having a top surface having a plurality of substrate bond pads thereon;
• a first semiconductor die having a top surface and a bottom surface and having a first bond pad and a third bond pad, both on its top surface, wherein the first semiconductor die is mounted to the substrate such that the bottom surface of the first semiconductor die faces the top surface of the substrate;
• a first wire connecting the first bond pad to a first one of the plurality of substrate bond pads;
• a second semiconductor die having a top surface and a bottom surface, and having a second bond pad on its top surface and a fourth bond pad on its bottom surface;
• and
• an interposer disposed between the first semiconductor die and the second semiconductor die such that a space exists between the top surface of the first semiconductor die and the bottom surface of the second semiconductor die and comprising an electrically conductive material electrically coupled to the third bond pad and fourth bond pad, wherein at least a portion of the first wire passes through the space between the top surface of the first semiconductor die and the bottom surface of the second semiconductor die.

A semiconductor package comprising:

• a packaging substrate having a top surface having a plurality of substrate bond pads thereon;
• a first semiconductor die having a top surface and a bottom surface and having a first bond pad and a third bond pad on its top surface;
• a first wire connecting the first bond pad to a first one of the plurality of substrate bond pads;
• a second semiconductor die having a top surface and a bottom surface and having a second bond pad on its top surface and a fourth bond pad on its bottom surface, the second semiconductor die electrically connected to the substrate, wherein:
• at least a portion of the first semiconductor die is in between the second semiconductor die and the substrate such that at least a portion of the top surface of the first semiconductor die faces the bottom surface of the second semiconductor die;
• and
• the surface area of the top surface of the first semiconductor die is not more than 16 mm2 greater than the surface area of the bottom surface of the second semiconductor die;
• and
• an interposer comprising an electrically conductive material attached to both the third bond pad and the fourth bond pad and disposed between the first semiconductor die and the second semiconductor die such that a space exists between the top surface of the first semiconductor die and the bottom surface of the second semiconductor die.

A semiconductor package comprising:

• a packaging substrate having a top surface having a plurality of substrate bond pads thereon;
• a first semiconductor die having a top surface and a bottom surface and having a first bond pad and a third bond pad on its top surface, wherein the first semiconductor die is mounted to the substrate such that the bottom surface of the first semiconductor die faces the top surface of the substrate;
• a first wire connecting the first bond pad to a first one of the plurality of substrate bond pads;
• a second semiconductor die having a top surface and a bottom surface and having a second bond pad on its top surface and a fourth bond pad on its bottom surface;
• an electrically conducting separating means for separating the first semiconductor die from the second semiconductor die and electrically connecting the third bond pad and the fourth bond pad such that a space exists between the top surface of the first semiconductor die and the bottom surface of the second semiconductor die;
• wherein
• at least a portion of the first wire passes through the space between the top surface of the first semiconductor die and the bottom surface of the second semiconductor die.