Device including a resistive path to introduce an equivalent RC circuit
AssigneeSun Microsystems, Inc.
InventorJames B. Burr
Life of this patent
Estimating the term…
Abstract
Structures for providing devices that include resistive paths specifically designed to provide a predetermined resistance between the bulk material of the device and a well tie contact. By providing a resistive path, an equivalent RC circuit is introduced to the device that allows the bulk material potential to track the gate potential, thereby advantageously lowering the threshold voltage as the device turns on and raising the threshold voltage as the device turns off. In addition, the introduction of the resistive path also allows the bulk material potential to be controlled and stabilize at an equilibrium potential between switching events.
Claims7
A device comprising:
- a substrate having a first dopant concentration of a first conductivity type;
- an epitaxial layer formed on said substrate, said epitaxial layer having a second dopant concentration of said first conductivity type;
- source and drain regions positioned within said epitaxial layer and separated by a channel region, said source and drain regions having a second conductivity type;
- a gate positioned over said channel region;
- and
- a resistive path, said resistive path being positioned in said epitaxial layer and said substrate so as to couple a first location in said epitaxial layer, below said channel region, to a second location in said epitaxial layer, said resistive path having a horizontal length in said substrate, wherein;
- said horizontal length of said resistive path is chosen to provide a resistance between said first location and said second location in said epitaxial layer within a specific range of resistance values.
A device comprising:
- a substrate having a first dopant concentration of a first conductivity type;
- an epitaxial layer formed on said substrate, said epitaxial layer having a second dopant concentration of said first conductivity type;
- source and drain regions positioned within said epitaxial layer and separated by a channel region, said source and drain regions having a second conductivity type;
- a gate positioned over said channel region;
- a resistive path, said resistive path being positioned in said epitaxial layer and said substrate so as to couple a first location in said epitaxial layer, below said channel region, to a second location in said epitaxial layer, said resistive path having a horizontal length in said substrate;
- and
- a well tie of said first conductivity type positioned within said epitaxial layer, said well tie being positioned beside one of said source or drain regions and outside said channel region, said well tie being electrically coupled to said second location in said epitaxial layer, said well tie being coupled to a first supply voltage, wherein;
- said horizontal length of said resistive path is chosen to provide a resistance between said first location and said second location in said epitaxial layer within a specific range of resistance values, further wherein;
- said device is characterized as having an on current and an off current and the ratio of on current to off current in said device is not greater than about 105, further wherein;
- said device has an unbiased threshold voltage of between about −150 millivolts and +150 millivolts.
Dependencies are inferred from the claim text.