Non-volatile semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorsToshitake Yaegashi, Kazuhiro Shimizu, Seiichi Aritome
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Abstract
In a non-volatile semiconductor memory device and a method for manufacturing the device, each memory cell and its select Tr have the same gate insulating film as a Vcc Tr. Further, the gate electrodes of a Vpp Tr and Vcc Tr are realized by the use of a first polysilicon layer. A material such as salicide or a metal, which differs from second polysilicon (which forms a control gate layer), may be provided on the first polysilicon layer. With the above features, a non-volatile semiconductor memory device can be manufactured by reduced steps and be operated at high speed in a reliable manner.
Claims12
A non-volatile semiconductor memory device comprising:
- a memory cell formed on a semiconductor substrate, the memory cell including a first gate insulating film, a first conductor serving as a floating gate layer, a second conductor serving as a control gate layer, a first insulating film covering an upper surface of the second conductor, an interlayer-insulating film electrically insulating the first conductor from the second conductor, a side surface insulating film, source/drain diffusion layers, silicide layers formed on surfaces of the source/drain diffusion layers;
- the first conductor, the second conductor, the first insulating film, and the interlayer-insulating film having a self-aligned structure;
- and
- a transistor formed on the semiconductor substrate, the transistor including a second gate insulating film, a gate electrode, source/drain diffusion layers, a silicide layer formed on an upper surface of the gate electrode and silicide layers formed on surfaces of the source/drain diffusion layers, the gate electrode comprising a third conductor, wherein
- the side surface insulating film covers a side wall of the first conductor, a side wall of the second conductor, and a side wall of the first insulating film.
Dependencies are inferred from the claim text.