Display array with mutually connected lines that are disconnected at the time of mounting array drivers
AssigneeCanon Kabushiki Kaisha
InventorsMinoru Watanabe, Noriyuki Kaifu, Chiori Mochizuki
Life of this patent
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Abstract
In a semiconductor device having a plurality of thin film transistors and matrix wiring lines formed on a substrate, the matrix wiring lines are electrically connected via resistors in order to prevent electrostatic destructions during a panel manufacture process and improve a manufacture yield.
Claims15
A semiconductor device having a plurality of thin film transistors and capacitors disposed on a substrate, comprising:
- a common electrode bias line which is connected to a common electrode driver and which applies a bias to said capacitors;
- a plurality of gate lines each of which is connected to a gate driver and applies a voltage to a gate electrode of a respective one of said plurality of thin film transistors;
- and
- a plurality of transfer lines each of which is connected to a signal processing IC or a source driver,
- wherein, after completing connections of said common electrode bias line, said gate lines and said transfer lines, and at a time of mounting said common electrode driver, said gate driver, said signal processing IC and a source driver, mutual connections of wirings are disconnected.
A method of manufacturing a semiconductor device having a plurality of thin film transistors and capacitors disposed on a substrate, comprising a common electrode bias line which applies a bias to the capacitors, gate lines each of which is connected to a gate electrode of a respective one of the plurality of thin film transistors, and transfer lines each of which is connected to one of source and drain of a respective one of the plurality of thin film transistors, comprising steps of:
- connecting electrically and mutually the common bias line, the plurality of gate lines and the plurality of transfer lines;
- and
- slicing for disconnecting at least one section of the connecting sections of the common electrode bias line, the gate lines and the transfer lines after the connections thereof.
Dependencies are inferred from the claim text.