Semiconductor device and a method of manufacturing thereof

A method of manufacturing a semiconductor device comprising the steps of:

• forming a first film on a semiconductor substrate,
• forming on said first film an etching mask having an opening exposing partially the surface of said first film,
• forming a first hole having a sidewall and a bottom wall of said first film and a diameter reduced in the direction towards said semiconductor substrate by selectively and anisotropically etching said first film using said etching mask,
• removing said etching mask, and
• forming a second hole having a sidewall matching the sidewall of said first hole by etching anisotropically said first film.

A method of manufacturing a semiconductor device comprising the steps of:

• forming an insulating film so as to be in contact with a main surface of a semiconductor substrate,
• forming on said insulating film a first film of a material having an under-etching characteristic different from that of said insulating film,
• forming on said first film a second film of a material having an under-etching characteristic different from that of said first film,
• forming a first hole exposing the surface of said first film and having a sidewall of said second film by selectively etching said second film,
• forming on said second film including the sidewall of said first hole a third film of a material having an under-etching characteristic equal to that of said second film,
• forming a sidewall layer on the sidewall of said first hole by etching anisotropically said third film,
• forming a second hole exposing the surface of said insulating film-and having a diameter smaller than that of said first hole by etching anisotropically said first film with said second film and said sidewall layer as a mask, and
• forming a third hole in said insulating film communicating with said second hole and reaching to the main surface of said semiconductor substrate by etching anisotropically said insulating film using said first film as a mask.

The method of manufacturing a semiconductor device according to clam 16, following said step of forming said third hole, further comprising the steps of:

• forming a resist on said first film to fill said third hole with said resist,
• etching said resist to expose said first film leaving said resist filled in said third hole,
• removing said first film by etching using said resist filled in said third hole as a mask, and
• removing said resist.

A method of manufacturing a DRAM comprising the steps of:

• forming a MOS transistor having a pair of impurity regions serving as a source/drain region at the main surface of a semiconductor substrate,
• forming an insulating film on said semiconductor substrate to cover said MOS transistor,
• forming on said insulating film a first film of a material having an under-etching characteristic different from that of said insulating film,
• forming on said first film a second film having a first hole at the upper portion of one of the impurity regions of said pair, and of a material having an under-etching characteristic different from that of said first film,
• forming a third film on said second film including the sidewall of said first hole, and of a material having an under-etching characteristic equivalent to that of said second film,
• forming a sidewall layer at the sidewall of said first hole by etching anisotropically said third film,
• forming a second hole exposing the surface of said insulating film and having a diameter smaller than that of said first hole by etching anisotropically said first film using said second film and said sidewall layer as a mask,
• forming a third hole in said insulating film in communication with said second hole and exposing said impurity region by etching anisotropically said insulating film using said first film as a mask,
• forming a storage node on said insulating film and connected to said impurity region via said third hole,
• forming a dielectric film on said storage node, and forming a cell plate on said dielectric film.

A method of manufacturing a semiconductor memory device comprising the steps of:

• forming a MOS transistor having a pair of impurity regions which become the source/drain region at the main surface of a semiconductor substrate,
• forming an insulating film on the main surface of said semiconductor substrate so as to cover said MOS transistor,
• forming in a stacked layer a first conductive film of a material having an under-etching characteristic different from that of said insulating film, and then a first covering film having an under-etching characteristic different from that of said first conductive film, and forming a first hole in said first conductive film and said first covering film,
• forming a second conductive film of a material having an under-etching characteristic different from that of said first covering film, on the sidewall of said first hole and on said first covering film,
• etching an anisotropically said second conductive film to form a sidewall layer on the sidewall of said first hole so as to come into contact with said first conductive film,
• etching anisotropically said insulating film using said sidewall layer as a mask to form a second hole in said insulating film and removing said first covering film,
• forming a third conductive film so as to come into contact with the surface of said first conductive film and said sidewall layer, and so as to be connected with said impurity region via said second hole,
• forming a capacitor dielectric film so as to cover the surface of a storage node having said first conductive film, said sidewall layer, and said third conductive film, and
• forming a cell plate on said capacitor dielectric film.

A method of manufacturing a semiconductor memory device comprising the steps of:

• forming a MOS transistor having a pair of impurity regions serving as the source/drain regions at the main surface of a semiconductor substrate,
• forming a first insulating film having a planar upper face on the main surface of said semiconductor substrate so as to cover said MOS transistor,
• forming a first conductive film on the upper face of said first insulating film with a second insulating film having a predetermined thickness therebetween,
• forming a second conductive film on said first conductive film with a third insulating film having a predetermined thickness therebetween,
• forming on said second conductive film a first covering film having a first hole above said impurity region,
• forming a second covering film on the sidewall of said first hole and said first covering film,
• etching anisotropically said second covering film for forming a sidewall layer on the sidewall of said first hole,
• etching anisotropically said second conductive film using said first covering film and said sidewall layer as a mask to expose the surface of said third insulating film, and forming a second hole having a diameter smaller than that of said first hole,
• etching anisotropically in order said third insulating film, said first conductive film, said second insulating film and said first insulating film for forming a third hole communicating with said second hole and exposing said impurity region, and removing said first covering film and said sidewall layer,
• forming a third conductive layer so as to come into contact the surface of said second conductive film and so as to be connected to said impurity region via said second and third holes,
• patterning said first, second and third conductive films for forming a storage node,
• removing said second and third insulating films,
• forming a capacitor dielectric film so as to cover the surface of said storage node, and
• forming a cell plate on said capacitor electric film.

A method of manufacturing a semiconductor memory device including a MOS transistor having a pair of impurity regions forming source/drain regions, and a capacitor having a storage node, wherein said impurity region and said storage node are electrically connected via a first hole formed in an insulating film covering said MOS transistor, said manufacturing method comprising the steps of:

• forming on said insulating film a first film having a second hole above said impurity region,
• forming a second film on the inside wall face of said second hole and all over the surface of said first film, detection signal detect means for detecting light transmitted through said spatial frequency filter as a detection signal corresponding to detection in the pattern of said specimen,
• forming a sidewall layer on the sidewall of said second hole by etching anisotropically said second film, and
• etching anisotropically said insulating film using said first film and said sidewall layer as a mask to expose partially a surface of said impurity region for forming in said insulating film said first hole having a diameter smaller than that of said second hole.