Wafer level package and method for manufacturing the same

A method of forming a thermal-stress-absorbing interface structure for semiconductor packaging, comprising:

• providing a semiconductor chip having a plurality chip pads and a passivation layer thereon;
• forming a multi-layer thermal-stress-absorbing support structure over the resulting structure;
• forming a first patterned conductor layer over the multi-layer support structure;
• forming a first patterned insulation layer over the first patterned conductor layer, the first patterned insulation layer having an opening therein, the opening exposing a portion of the first patterned conductor layer;
• and
• placing a conductive bump over the exposed portion of first patterned conductor layer.

A method of forming a wafer level package (WLP), comprising:

• providing a semiconductor wafer having a plurality of semiconductor chips and a plurality of scribe lines, each of the semiconductor chips having a plurality chip pads and a passivation layer thereon;
• forming one or more multi-layer thermal-stress-absorbing support structures over the resulting structure;
• forming a first patterned conductor layer including one or more conductive bump pads over corresponding one or more multi-layer thermal-stress-absorbing support structures,
• wherein the one ore more conductive bump pads includes a first length-wise end and a second length-wise end, the one or more conductive bump pad having an interconnection extending from the side thereof intermediate the first and the second ends;
• forming a first patterned insulation layer over the first patterned conductor layer, the first patterned insulation layer having one or more openings therein, the one or more openings exposing corresponding one or more conductive bump pads;
• placing one or more conductive bumps over corresponding one or more conductive bump pads;
• and
• singulating the wafer to separate the semiconductor chips to complete a WLP.