Method and apparatus of tool matching for a semiconductor manufacturing process
AssigneeProMOS Technologies Inc.
InventorsHung-Wen Chiou, Chia-Chun Tso
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Abstract
The present invention provides a method of tool matching for a semiconductor manufacturing process having a first and second path completed by serial combinations of tools for processing of wafers. The method comprises the steps of providing a target value, obtaining a first and second test result of the wafers processed through the first and second path respectively, calculating differences between the first and second test result and the target value to obtain a first and second estimate respectively, and selecting one of the first and second paths according to the estimates.
Claims18
A method of tool matching for a semiconductor manufacturing process having a first and second path completed by serial combinations of tools for processing of wafers, the method comprising the steps of:
- providing a target value;
- obtaining a first and second test result of the wafers processed through the first and second path respectively;
- calculating differences between the first and second test result and the target value to obtain a first and second estimate respectively;
- and
- selecting one of the first and second path according to the estimates.
A method of tool matching for a semiconductor manufacturing process having a plurality of paths completed by serial combinations of tools for processing of lots of wafers, the method comprising the steps of:
- providing a target value T;
- obtaining groups of test results of lots of wafers processed through the paths;
- calculating a mean value and variation of each group of the test results, wherein the mean value and variation of lot j of the wafers processed through path i are W(i,j) and σ(i,j) respectively;
- providing weights for the lots of the wafers, wherein the weight for lot j of the wafers processed through path i is R(i,j);
- calculating estimates P of the paths, wherein the estimate of path i using the wafers from M0th to Mcth lot is P ( i ) = ∑ j = m o j = m c R ( i , j ) [ [LeftBracketingBar] W ( i , j ) - T [RightBracketingBar] + σ ( i , j ) ] ;
- and selecting one of the paths according to the estimates.
A method for determining an optimized path for a semiconductor manufacturing process, the method comprising the steps of:
- providing a first path completed by serial combinations of tools for processing of wafers;
- providing a second path completed by serial combinations of tools for processing of wafers;
- providing a target value;
- obtaining a first test result and a second test result of the wafers processed through the first path and the second path respectively;
- calculating differences between the first test result and the target value to obtain a first estimate;
- calculating differences between the second test result and the target value to obtain a second estimate;
- and
- selecting one of the first path and the second path by comparing the first estimate with the second estimate.
The method as claimed in claim further comprising the steps of:
- obtaining variations of the first test result and the second test result;
- and
- calculating sums of the differences from the target value and variations of the first test result and the second test result to obtain the first estimate and the second estimate.
Dependencies are inferred from the claim text.