Method and apparatus for detecting errors in a First-In-First-Out buffer
AssigneeOpenTV, Inc.
InventorBrian L. Smith
Life of this patent
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Abstract
A method and apparatus for detecting errors in a First-In-First-Out buffer (FIFO). A FIFO includes verification bits associated with data entries. In addition, the FIFO includes an expected value bit for comparison on reads. Upon reset, the verification bits are initialized to an alternating sequence of binary values and the expected value bit is initialized to a predetermined binary value. On a write to a FIFO entry, the corresponding verification bit is toggled. On a read from an entry, the corresponding verification bit is compared to the expected value. If the verification bit does not match the expected value, an error is detected.
Claims13
A First-In-First-Out buffer (FIFO) comprising:
- a plurality of storage locations, each of said locations corresponding to a single verification bit of a plurality of verification bits, wherein said plurality of verification bits are initialized to an alternating sequence of binary values;
- a single expected value bit;
- write circuitry configured to:
- write data to a first storage location of said plurality of storage locations;
- and
- toggle a first verification bit of said verification bits which corresponds to said first storage location in response to said write;
- read circuitry configured to:
- read a second storage location of said locations;
- read a second verification bit of said verification bits which corresponds to said second storage location;
- and detect
- detect an error by comparing said second verification bit to said expected value bit.
A method comprising:
- initializing a plurality of verification bits to a sequence of alternating binary values, wherein each of said plurality of verification bits corresponds to one of a plurality of storage locations in a First-In-First-Out buffer (FIFO);
- writing a first data to a first storage location of said plurality of storage locations;
- toggling a first verification bit of said plurality of verification bits in response to said writing, wherein said first verification bit corresponds to said first storage location;
- reading said first data from said first storage location;
- reading said first verification bit;
- and
- detecting an error by comparing said first verification bit to an expected value bit.
Dependencies are inferred from the claim text.