System and method for initializing source-synchronous data transfers using ratio bits

A computer system, comprising:

• a memory configured to store initialization information for said computer system, wherein said initialization information includes at least one ratio bit, wherein said at least one ratio bit is encoded with a ratio between a second clock rate and a first clock rate;
• logic coupled to said memory for transmitting said initialization information;
• at least one processor coupled to receive a first system clock operating at said first clock rate and a second system clock operating at said second clock rate, wherein said at least one processor is configured to operate according to said second system clock, wherein the ratio between said second clock rate and said first clock rate is an integer number greater than or equal to one, wherein said at least one processor is further coupled to said logic with a serial line over which to receive said initialization information in one or more synchronous data transfers;
• and
• a device coupled to the at least one processor, wherein the device is configured to operate at the first clock rate;
• wherein said logic is configured transmit said initialization information over said serial line to said at least one processor, wherein said processor is further configured to decode said ratio bit to determine said first clock rate;
• wherein the device and the at least one processor are further configured to exchange data using source-synchronous clocks, wherein the device and the at least one processor are further configured to initialize said source-synchronous clocks using the ratio bit to determine a common clock edge.