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US 6,584,537 B1Granted
Data-cache data-path
AssigneeLSI Logic Corporation
InventorsFrank Worrell, Gagan V. Gupta
Life of this patent
Estimating the term…
Abstract
A circuit that may comprise a data-cache memory and a data-path circuit. The data-cache memory may be configured to (i) store a cache input data item among a plurality of associative sets and (ii) present a plurality of cache output data items. The data-path circuit may be configured to (i) independently shift each of the plurality of cache output data items and (ii) multiplex the plurality of shifted cache output data items to present an output data item.
Claims18
A circuit comprising:
- a cache memory configured to (i) store a cache input data item among a plurality of associative sets and (ii) present a plurality of cache output data items;
- and
- a data-path circuit configured to (i) independently shift each of said plurality of cache output data items and (ii) multiplex said plurality of cache output data items after said shift to present an output data item.
A method for improving a data transfer delay for a cache memory comprising the steps of:
- (A) storing a cache input data item in said cache memory;
- (B) independently shifting each of a plurality of cache output data items from said cache memory;
- and
- (C) multiplexing said plurality of cache output data items in response to step (B) to present an output data item.
1 more element
A circuit comprising:
- means for caching a cache input data item;
- means for independently shifting each of a plurality of cache output data items from said means for caching;
- and
- means for multiplexing said plurality of cache output data items to present an output data item in response to said means for independently shifting.
1 more element
Dependencies are inferred from the claim text.