Arbitration circuit with plural arbitration processors using memory bank history

An arbitration circuit comprising:

• a shared resource comprising a memory having a plurality of banks;
• a plurality of data ports, wherein each data port generates an access request output indicating whether the data port requests access to one of the memory banks of the shared resource, which is associated with the access request output;
• data routing circuitry, which selectively couples the plurality of data ports to the shared resource based on the access request outputs;
• and
• a plurality of arbitration processors, wherein each arbitration processor is associated with a respective one of the plurality of data ports and selectively forwards the access request output of that data port to the data routing circuitry based on predetermined arbitration rules and a status of all of the access request outputs, wherein only one of the arbitration processors forwards the access request output of its associated data port to the data routing circuitry at one time, and wherein each arbitration processor comprises means for defining a priority sequence through the plurality of data ports, whereby priority rotates from one of the data ports to a next subsequent one of the data ports in the sequence with each of a plurality of arbitration cycles, which include a current cycle, a most recent cycle and a next most recent cycle preceding the current cycle, and comprises means for granting access to the data port associated with the processor if that data port is the next subsequent data port and the bank associated with the memory request output of that data port satisfies a first bank criteria, wherein the first bank criteria is satisfied if the associated bank is different than the memory bank that was accessed in the most recent cycle.

An arbitration circuit comprising:

• a memory having a plurality of banks;
• a plurality of data ports, wherein each data port has means for generating a memory access request, which is associated with one of the memory banks;
• and
• means for rotating access to the memory from one of the data ports to the next in a circular sequence and for modifying the sequence if the memory access request from the data port currently having access to the memory in the circular sequence is associated with the memory bank that was most recently accessed and if the memory access request from another of the data ports is associated with a different one of the memory banks.