Information processing system, bus arbiter, and bus controlling method

A bus control method, in an information processing system having a plurality of first modules and a second module each connected to a first bus, a third module connected to a second bus, and a bus conversion device, connected to said first bus and said second bus, having a bus arbiter for arbitrating bus occupation of the modules, and a data storage unit, said method comprising the steps of:

• receiving, by said bus arbiter, a first bus occupation right request signal issued by one of said first modules for accessing said third module, a second bus occupation right request signal issued by one of said first modules, for accessing said third module, a third bus occupation right request signal issued by one of said first modules, for accessing said second modules, and access destination information indicating to which of the buses of a module access is to be conducted in correspondence with each of the bus occupation right request signal;
• receiving, a signal indicating that a storage area is full for storing access data corresponding to a specific access to said second bus;
• and
• referring to said access destination information, changing an order of said second bus occupation right request signal and said third bus occupation right request signal, and giving a bus occupation right to a bus master which issued said third bus occupation right request signal, when the bus occupation right request signals are received in an order of said first bus occupation right request signal, said second bus occupation right request signal, and said third bus occupation right request signal, and when said signal indicating that a storage area is full for storing access data has been received.