Intermediate buffer control for improving throughput of split transaction interconnect

An apparatus, comprising:

• (a) a shared resource;
• (b) a plurality of requesters, each configured to generate data transfer requests to access the shared resource, the plurality of requesters including a first requester configured to generate a first data transfer request;
• (c) a request buffer configured to receive data transfer requests from the first requester and forward such data transfer requests to the shared resource;
• (c) an intermediate buffer configured to receive data associated with the first data transfer request from the first requester in response to the first data transfer request and thereafter forward the data to the shared resource;
• and
• (d) intermediate buffer control logic, coupled to the intermediate buffer, the intermediate buffer control logic configured to inhibit a transfer of data associated with the first data transfer request from the first requester to the intermediate buffer until the first data transfer request is ready to be processed at the shared resource and a predetermined amount of space is available in the intermediate buffer.

An apparatus, comprising:

• (a) a shared memory coupled to a memory bus and configured to process transactions having a first length;
• (b) a processor coupled to a processor bus and configured to issue transactions having the first length;
• (c) an Accelerated Graphics Port (AGP) requester coupled to an AGP bus and configured to issue transactions having a second length that is longer than the first length;
• and
• (d) a chipset coupled to the memory, processor and AGP buses, the chipset comprising:
• (1) an AGP interface coupled to the AGP bus;
• (2) a processor interface coupled to the processor bus;
• (3) a shared memory interface coupled to the memory bus;
• (4) a request buffer configured to receive transactions from the AGP bus;
• (5) an intermediate buffer configured to receive data associated with transactions received from the AGP bus;
• (6) request buffer control logic, coupled to the request buffer, the request buffer control logic configured to forward transactions stored on the request buffer to the shared memory interface when the transactions are ready to be processed by the shared memory;
• and
• (7) intermediate buffer control logic, coupled to the intermediate buffer, the intermediate buffer control logic configured to transfer the data associated with a first transaction received from the AGP bus into the intermediate buffer if either (i) sufficient space exists in the intermediate buffer to complete the first transaction, or (ii) sufficient space exists in the intermediate buffer to start the first transaction and the first transaction is ready to be processed by the shared memory.

A method of interfacing a shared resource with a plurality of requesters, the method comprising:

• (a) receiving a plurality of data transfer requests from the plurality of requesters, a first data transfer request among the plurality of data transfer requests associated with a first requester among the plurality of requesters;
• (b) forwarding the data transfer requests to the shared resource;
• (c) inhibiting a transfer of data associated with the first data transfer request from the first requester to an intermediate buffer until the first data transfer request is ready to be processed at the shared resource and a predetermined amount of space is available in the intermediate buffer;
• and
• (d) forwarding data stored in the intermediate buffer to the shared resource.