System and method for efficient hardware implementation of a perfect precision blending function

An apparatus that calculates an intermediate value between a first value, X, and a second value, Y, the intermediate value being approximately equal to P*X+(1−P)*Y, where P is a non-zero, non-unitary fraction value with an odd number denominator, the apparatus comprising:

• a multiplication stage, the multiplication stage comprising one or more multiplexers, one or more adders and one or more shifters that calculate an initial result So, where
• So=(c*(numerator)*X)+(c*(denominator−numerator)*Y)+2d−1,
• wherein, d is the smallest integer such that (2d−1) divided by the denominator is a whole number, c equals (2d−1) divided by the denominator and one integer m is such that the smallest integer where 2m≧(n+d) divided by d;
• a division stage that further comprises
• one or more adding devices;
• and
• one or more shifters that calculate (incrementally from 1 to m), a value Si+1, where i equals 0 to (m−1), and Si+1=Si plus Si shifted to the left by (d*2i) places;
• and
• a decisive shifter to the shift the resulting Sm to the right by (d times 2m) places, to output the intermediate value.

A method for calculating an intermediate value between a first value, X, and a second value, Y, as P*X+(1−P)*Y where P is a non-zero, non-unitary fraction value with an odd number denominator, the method comprising:

• finding a smallest integer d such that (2d−1) divided by the denominator is a whole number;
• calculating a number c such that c equals (2d−1) divided by the denominator;
• finding an integer m such that m is a smallest whole number where 2m≧(n+d) divided by d;
• calculating an initial result So, where
• So=(c*(numerator)*X)+(c*(denominator−numerator)*Y)+2d−1;
• calculating (1 to m) Si+1 where i equals 0 to (m−1) and Si+1=Si plus Si shifted to the left by (d*2i) places;
• and
• shifting Sm to the right by (d times 2m) places which produces the intermediate value.

A computer system comprising:

• a processor,
• a bus connected to the processor,
• a graphics controller connected to the bus, the graphics controller comprising:
• an apparatus that calculates an intermediate value between a first value, X and a second value, Y, the intermediate value being approximately equal to P*X+(1−P)*Y where P is a non-zero, non-unitary fraction value with an odd number denominator, the apparatus comprising:
• a combined multiplication stage including one or more multiplexing devices, each having inputs to receive the first and second values, and each having a select input to receive a bit signal based on a numerator of the fraction value multiplied by a constant, c, and an adder coupled to outputs of the multiplexing devices;
• and
• a display device that displays output from the graphics controller;
• wherein c equals (2d−1) divided by the denominator, and integer d is the smallest integer such that the denominator divides (2d−1).