System and method for predicting design errors in integrated circuits

A system for determining a current design state of an integrated circuit design, comprising:

• an inference engine for automatically inferring at least one conditional probability of the occurrence of at least one design error in the circuit design;
• a probabilistic model for automatically determining conditional relationships between attributes of the current design and the at least one conditional probability of the occurrence of the at least one design error;
• and
• a dynamic data matrix comprising current design information, the conditional relationships between attributes of the current design, and the at least one conditional probability of the occurrence of the at least one design error.

A computer-readable medium having computer-executable modules for identifying design errors in an integrated circuit comprising:

• an inference processor that automatically infers at least one conditional probability for predicting an occurrence of at least one design error;
• a probabilistic model processor for automatically determining conditional relationships between the conditional probabilities and predicted design errors of the current design, and design attributes associated with the conditional probabilities and the predicted design errors;
• and
• a data processor for dynamically generating and displaying current design information, the conditional relationships between attributes, and the conditional probabilities and predicted design errors of the current design in an interactive computer program environment.