Storage device counting error correction
AssigneeHitachi, Ltd.
InventorsKunihiro Katayama, Takayuki Tamura, Yusuke Jono, Motoki Kanamori, Atsushi Shikata
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Abstract
A semiconductor storage device that determines the cause of an error at the time of the error correction of data read out from a non-volatile semiconductor memory, on the basis of a previously recorded error correction count, and selects a data refresh processing or a substitute processing to perform. When the error is detected, the corrected data is rewritten back for preventing reoccurrence of error due to accidental cause. If it is determined that the reoccurrence frequency of the error is high and the error is due to degradation of the storage medium, based on the error correction count, the substitute processing is performed.
Claims8
A storage apparatus to be coupled with a system bus for receiving a write request accompanied with data through said system bus from a host system comprising:
- a nonvolatile flash semiconductor memory comprising a plurality of memory blocks and a management area, and
- a controller unit which is coupled with said system bus and said nonvolatile flash semiconductor memory, and which carries out error detection and correction operations with respect to read data from one of said plurality of memory blocks of said nonvolatile flash semiconductor memory;
- wherein said controller unit keeps count of the error correction operation of the read data for each block to determine whether the count reaches a predetermined value and if it determines that the count of the error correction operation has not yet reached said value, the control unit carries out a recording operation of data after the error correction operation in the same memory block of said plurality of memory blocks.
A storage apparatus to be coupled with a system bus for receiving a write request accompanied with data through said system bus from a host system comprising:
- a nonvolatile flash semiconductor memory comprising a plurality of memory blocks and a management area, and
- a controller unit which is coupled with said system bus and said nonvolatile flash semiconductor memory, and which carries out error detection and correction operations with respect to read data from one of said plurality of memory blocks of said nonvolatile flash semiconductor memory;
- wherein said controller unit keeps count of error occurrence in one operation of the error detection and correction of the read data to determine whether the count reaches a predetermined value and if it determines that the count of the error occurrence has not yet reached said value, the controller unit carries out a recording operation of data after the error correction operation in the same memory block of said plurality of memory blocks.
Dependencies are inferred from the claim text.