Semiconductor memory device having increased memory capacity while reducing mounting area and stand-by current

A semiconductor memory device for receiving/transmitting storage data from/to an external source, comprising:

• a first volatile memory circuit of a first type, for receiving a supply of a power-supply potential from a first power-supply node;
• a second volatile memory circuit of a second type different from said first type, for receiving a supply of a power-supply potential from a second power-supply node;
• a non-volatile memory circuit for receiving a supply of a power-supply potential from a third power-supply node;
• and
• a package enclosing said first and second volatile memory circuits and said non-volatile memory circuit, wherein
• said first volatile memory circuit includes a plurality of first data input/output nodes for transferring said storage data,
• said second volatile memory circuit includes a plurality of second data input/output nodes for transferring said storage data,
• said non-volatile memory circuit includes a plurality of third data input/output nodes for transferring said storage data,
• said semiconductor memory device further comprises a plurality of data input/output leads for transferring said storage data between said plurality of first to third data input/output nodes and a source external to said package, and
• said plurality of first to third data input/output nodes are respectively connected to said plurality of data input/output leads, corresponding bits by bits, within said package.

A semiconductor memory device for receiving/transmitting storage data from/to an external source, comprising:

• a first volatile memory circuit of a first type, for receiving a supply of a power-supply potential from a first power-supply node;
• a second volatile memory circuit of a second type different from said first type, for receiving a supply of a power-supply potential from a second power-supply node;
• a non-volatile memory circuit for receiving a supply of a power-supply potential from a third power-supply node;
• and
• a package enclosing said first and second volatile memory circuits and said non-volatile memory circuit, wherein
• said first volatile memory circuit includes a plurality of first address input nodes for receiving an address signal corresponding to said storage data,
• said second volatile memory circuit includes a plurality of second address input nodes for receiving said address signal,
• said non-volatile memory circuit includes a plurality of third address input nodes for receiving said address signal,
• said semiconductor memory device further comprises a plurality of address input leads for inputting an address signal from a source external to said package to said plurality of first to third address input nodes, and
• said plurality of first to third address input nodes are connected to said plurality of address input leads, at least a part of corresponding bits by bits, within said package.

A semiconductor memory device for receiving/transmitting storage data from/to an external source, comprising:

• a first volatile memory circuit of a first type, for receiving a supply of a power-supply potential from a first power-supply node;
• a second volatile memory circuit of a second type different from said first type, for receiving a supply of a power-supply potential from a second power-supply node;
• a non-volatile memory circuit for receiving a supply of a power-supply potential from a third power-supply node;
• a package enclosing said first and second volatile memory circuits and said non-volatile memory circuit;
• a first chip on which said first volatile memory circuit is formed;
• a second chip on which said second volatile memory circuit is formed;
• and
• a third chip on which said non-volatile memory circuit is formed.

A semiconductor memory device for receiving/transmitting storage data from/to an external source, comprising:

• a first dynamic volatile memory circuit for receiving a supply of a power-supply potential from a first power-supply node;
• a second static volatile memory circuit for receiving a supply of a power-supply potential from a second power-supply node;
• a non-volatile memory circuit for receiving a supply of a power-supply potential from a third power-supply node;
• and
• a package enclosing said first and second volatile memory circuits and said non-volatile memory circuit, wherein
• said first dynamic volatile memory circuit includes a first memory array having a plurality of first memory cells of the dynamic type,
• said second static volatile memory circuit includes a second memory array having a plurality of second memory cells of the static type, and
• said non-volatile memory circuit includes a third memory array having a plurality of non-volatile memory cells.

A semiconductor memory device for receiving/transmitting storage data from/to an external source, comprising:

• a first dynamic volatile memory circuit for receiving a supply of a power-supply potential from a first power-supply node;
• a second static volatile memory circuit for receiving a supply of a power-supply potential from a second power-supply node;
• a non-volatile memory circuit for receiving a supply of a power-supply potential from a third power-supply node;
• a package enclosing said first and second volatile memory circuits and said non-volatile memory circuit;
• a first lead connected to said first and second power-supply nodes, and for supplying a first power-supply potential from a source external to said package;
• and
• a second lead connected to said third power-supply node, and for supplying a second power-supply potential from a source external to said package, independent of said first power-supply potential.

A semiconductor memory device for receiving/transmitting storage data from/to an external source, comprising:

• a first dynamic volatile memory circuit for receiving a supply of a power-supply potential from a first power-supply node;
• a second static volatile memory circuit for receiving a supply of a power-supply potential from a second power-supply node;
• a non-volatile memory circuit for receiving a supply of a power-supply potential from a third power-supply node;
• a package enclosing said first and second volatile memory circuits and said non-volatile memory circuit;
• a first lead connected to said second and third power-supply nodes, and for supplying a first power-supply potential from a source external to said package;
• and
• a second lead connected to said first power-supply node, and supplying for a second power-supply potential from a source external to said package, independent of said first power-supply potential.

A semiconductor memory device for receiving/transmitting storage data from/to an external source, comprising:

• a first dynamic volatile memory circuit for receiving a supply of a power-supply potential from a first power-supply node;
• a second static volatile memory circuit for receiving a supply of a power-supply potential from a second power-supply node;
• a non-volatile memory circuit for receiving a supply of a power-supply potential from a third power-supply node;
• a package enclosing said first and second volatile memory circuits and said non-volatile memory circuit;
• a first lead connected to said first power-supply node, and for supplying a first power-supply potential from a source external to said package;
• a second lead connected to said second power-supply node, and for supplying a second power-supply potential from a source external to said package, independent of said first power-supply potential;
• and
• a third lead connected to said third power-supply node, and for supplying a third power-supply potential from a source external to said package, independent of said first and second power-supply potentials.