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US 6,583,745 B2Granted
A/D converter
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsKazuo Sakakibara, Minoru Takeuchi
Life of this patent
Estimating the term…
Abstract
An A/D converter has a successive approximation register having a plurality of A/D registers each corresponding to one of A/D inputs. A capacitor in a comparator is charged by a voltage determined based on a value held in an A/D register corresponding to an A/D input to be A/D converted before starting A/D conversion of the A/D input, thereby reducing noise generated at the time of selecting A/D inputs to enhance A/D conversion accuracy.
Claims11
An A/D converter comprising:
- an input selection circuit for sequentially selecting a plurality of A/D inputs, and outputting one of the plurality of A/D inputs;
- a comparator having a capacitor for holding an A/D input voltage output from said input selection circuit for a certain period of time, said comparator comparing the voltage with a comparison voltage;
- a successive approximation register having A/D registers each corresponding to one of said A/D inputs for holding A/D conversion values based on comparison results by said comparator;
- a decoder for outputting said comparison voltage obtained by D/A converting a value held by said successive approximation register;
- and
- an A/D control circuit for switching an ON/OFF state of respective switches provided in said input selection circuit, said comparator, and said successive approximation register, and initially charging the capacitor in said comparator by a voltage determined based on the value held by either of said A/D register corresponding to an A/D input to be A/D converted before controlling A/D conversion of the A/D input.
3 more elements
An A/D converter comprising:
- an input selection circuit for sequentially selecting a plurality of A/D inputs, and outputting one of the plurality of A/D inputs;
- a comparator having a capacitor for holding an A/D input voltage output from said input selection circuit for a certain period of time, said comparator comparing the voltage with a comparison voltage;
- a successive approximation register having A/D registers each corresponding to one of said A/D inputs for holding A/D conversion values based on comparison results by said comparator;
- a decoder for outputting said comparison voltage obtained by D/A converting a value held by said successive approximation register;
- and
- the A/D control circuit initially charges the capacitor in the comparator by a voltage corresponding to the previous A/D conversion value of said A/D input before controlling current A/D conversion of the A/D input.
3 more elements
An A/D converter comprising:
- an input selection circuit for sequentially selecting a plurality of A/D inputs, and outputting one of the plurality of A/D inputs;
- a comparator having a capacitor for holding an A/D input voltage output from said input selection circuit for a certain period of time, said comparator comparing the voltage with a comparison voltage;
- a successive approximation register having A/D registers each corresponding to one of said A/D inputs for holding A/D conversion values based on comparison results by said comparator;
- a decoder for outputting said comparison voltage obtained by D/A converting a value held by said successive approximation register;
- and
- the A/D control circuit initially charges the capacitor in the comparator by the voltage equal to half of said reference voltage before controlling first A/D conversion of the A/D input.
3 more elements
An A/D converter comprising:
- an input selection circuit for sequentially selecting a plurality of A/D inputs, and outputting one of the plurality of A/D inputs;
- a comparator having a capacitor for holding an A/D input voltage output from said input selection circuit for a certain period of time, said comparator comparing the voltage with a comparison voltage;
- a successive approximation register having A/D registers each corresponding to one of said A/D inputs for holding A/D conversion values based on comparison results by said comparator;
- a decoder for outputting said comparison voltage obtained by D/A converting a value held by said successive approximation register;
- and
- a time adjustment register provided to set a time period from the time when the capacitor in the comparator has been charged by the A/D input voltage output from the input selection circuit, to the initiation of A/D conversion of the A/D input;
- and
- the A/D control circuit initially charges said capacitor by said A/D input voltage a predetermined period of time before initiating A/D conversion of the A/D input, said predetermined period of time being read from said time adjustment register.
5 more elements
Dependencies are inferred from the claim text.