System and method for self-calibrating a multi-bit delta-sigma analog to digital (A/D) converter during operation of the A/D converter

A method for configuring a digital correction unit for an analog to digital (A/D) converter during operation of the A/D converter on received input signals, wherein the A/D converter includes an internal D/A converter, wherein the internal D/A converter includes a plurality M of current generators, wherein one or more of the current generators produces linearity errors in the A/D converter,

• wherein the digital correction unit is configurable with a set of correction values, wherein the correction values are determined from coefficients E(n) for n=0 to M−1, wherein each coefficient E(n) is associated with one of the current generators in the internal D/A converter, the method comprising:
• a) for each of a plurality of possible values of a coefficient E(n):
• configuring the digital correction unit with a current set of correction values, wherein the current set of correction values includes a value based on one of said possible values of E(n);
• operating the A/D converter on a received input signal, wherein said operating includes performing an analog low pass filter operation on the received input signal, wherein said operating uses dynamic element matching in the internal D/A converter;
• in response to being configured with each of the various different sets of correction values, the digital correction unit operating to correct the output samples based on that one of the various different sets of correction values;
• performing a digital high pass filter operation on corrected output samples of the A/D converter;
• determining a noise value from the corrected output samples of the A/D converter after said performing the digital high pass filter operation;
• b) selecting one of said possible values for E(n) that produces the least noise value;
• performing steps a) and b) for a plurality of coefficients E to produce a final set of coefficients E;
• and
• configuring the digital correction unit with correction values based on the final set of coefficients E;
• wherein the digital correction unit is useable in correcting for linearity errors in the A/D converter.

An analog to digital (A/D) converter system, comprising:

• an input for receiving an input signal;
• an analog low pass filter for performing an analog low pass filter operation on the received input signal;
• an internal A/D converter coupled to the input;
• an internal D/A converter coupled to the internal A/D converter, wherein the internal D/A converter includes a plurality M of current generators, wherein one or more of the current generators produces linearity errors in the A/D converter;
• a digital correction unit coupled to receive output samples from the A/D converter and to output corrected samples, wherein the digital correction unit is configurable with a set of correction values, wherein the digital correction unit is configured to generate the corrected output samples in response to the output samples and a currently configured set of correction values,
• a processor coupled to the digital correction unit and comprised in the A/D converter, wherein the processor is operable to:
• configure the digital correction unit with various different sets of correction values during operation of the A/D converter;
• perform a digital high pass filter operation on the corrected output samples of the A/D converter;
• examine the corrected output samples of the A/D converter after performing the digital high pass filter operation;
• select one of said sets of correction values;
• and
• configure the digital correction unit with the selected one of said sets of correction values;
• wherein the digital correction unit is useable in correcting for linearity errors in the A/D converter.

An analog to digital (A/D) converter system, comprising:

• an input for receiving an input signal;
• an analog low pass filter for performing an analog low pass filter operation on the received input signal
• an internal A/D converter coupled to the input;
• an internal D/A converter coupled to the internal A/D converter, wherein the internal D/A converter includes a plurality M of current generators, wherein one or more of the current generators produces linearity errors in the A/D converter;
• a digital correction unit, wherein the digital correction unit is configurable with a set of correction values, wherein the correction values are determined from coefficients E(n) for n=0 to M−1, wherein each coefficient E(n) is associated with one of the current generators in the internal D/A converter;
• a processor coupled to the digital correction unit and comprised in the A/D converter, wherein the processor is operable to:
• a) for each of a plurality of possible values of a coefficient E(n):
• configure the digital correction unit with a current set of correction values, wherein the current set of correction values includes a value based on one of said possible values of E(n);
• operate the A/D converter, wherein the A/D converter said operates using dynamic element matching in the internal D/A converter;
• perform a digital high pass filtering operation on output samples of the A/D converter that have been corrected by the digital correction unit;
• and
• determine a noise value from the filtered output samples of the A/D converter;
• b) select one of said possible values for E(n) that produces the least noise value;
• perform a) and b) for a plurality of coefficients E to produce a final set of coefficients E;
• and
• configure the digital correction unit with correction values based on the final set of coefficients E;
• wherein the digital correction unit is useable in correcting for linearity errors in the A/D converter.