US 6,583,669 B1Granted

Apparatus and method for a compact class AB turn-around stage with low noise, low offset, and low power consumption

AssigneeNational Semiconductor Corporation

InventorsRudy G. H. Eschauzier, Nico van Rijn

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Abstract

A turn-around stage is provided that accepts the full current swing from an input stage while maintaining a low quiescent current. The circuitry provides Class AB operation with quiescent currents that are significantly less than the maximum signal current so that overall power consumption is significantly reduced. Also, the amount of noise and offset contributions of the circuit are reduced by reducing the transconductances associated with transistors included in the turn-around stage.

Claims10

Dependent claims

A class AB amplifier that operates from a high power supply and a low power supply, comprising:

a first transistor having a gate terminal that is coupled to a first node, a source terminal that is coupled to the low power supply, and a drain terminal that is coupled a second node;
a second transistor having a gate terminal that is coupled to the first node, a source terminal that is coupled to the low power supply, and a drain terminal that is coupled to a third node;
a third transistor having a gate terminal that is coupled to a fourth node, a source terminal that is coupled to the second node, and a drain terminal that is coupled to a fifth node;
a fourth transistor having a gate terminal that is coupled to the fourth node, a source terminal that is coupled to the third node, and a drain terminal that is coupled to the first node;
a fifth transistor having a gate terminal that is coupled to a sixth node, a source terminal that is coupled to the second node, and a drain terminal that is coupled to the sixth node;
a sixth transistor having a gate terminal that is coupled to the sixth node, a source terminal that is coupled to the third node, and a drain terminal that is coupled to a seventh node;
a seventh transistor having a gate terminal that is coupled to an eighth node, a source terminal that is coupled to the high power supply, and a drain terminal that is coupled to a ninth node;
an eighth transistor having a gate terminal that is coupled to the eighth node, a source terminal that is coupled to the high power supply, and a drain terminal that is coupled to a tenth node;
a ninth transistor having a gate terminal that is coupled to an eleventh node, a source terminal that is coupled to the ninth node, and a drain terminal that is coupled to the sixth node;
a tenth transistor having a gate terminal that is coupled to the eleventh node, a source terminal that is coupled to the tenth node, and a drain terminal that is coupled to the eighth node;
an eleventh transistor having a gate terminal that is coupled to the fifth node, a source terminal that is coupled to the ninth node, and a drain terminal that is coupled to the fifth node;
a twelfth transistor having a gate terminal that is coupled to the fifth node, a source terminal that is coupled to the tenth node, and a drain terminal that is coupled to a twelfth node;
a floating current source that is coupled between the first node and the eighth node;
and
a resistive circuit that is coupled between the seventh node and the twelfth node, wherein the second and third nodes are arranged to operate as inputs to a class AB turn-around stage, and the seventh and twelfth nodes operate as drive points for an output of the class AB turn-around stage.

12 more elements

Dependencies are inferred from the claim text.

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Abstract

A class AB amplifier that operates from a high power supply and a low power supply, comprising:

a first transistor having a gate terminal that is coupled to a first node, a source terminal that is coupled to the low power supply, and a drain terminal that is coupled a second node;
a second transistor having a gate terminal that is coupled to the first node, a source terminal that is coupled to the low power supply, and a drain terminal that is coupled to a third node;
a third transistor having a gate terminal that is coupled to a fourth node, a source terminal that is coupled to the second node, and a drain terminal that is coupled to a fifth node;
a fourth transistor having a gate terminal that is coupled to the fourth node, a source terminal that is coupled to the third node, and a drain terminal that is coupled to the first node;
a fifth transistor having a gate terminal that is coupled to a sixth node, a source terminal that is coupled to the second node, and a drain terminal that is coupled to the sixth node;
a sixth transistor having a gate terminal that is coupled to the sixth node, a source terminal that is coupled to the third node, and a drain terminal that is coupled to a seventh node;
a seventh transistor having a gate terminal that is coupled to an eighth node, a source terminal that is coupled to the high power supply, and a drain terminal that is coupled to a ninth node;
an eighth transistor having a gate terminal that is coupled to the eighth node, a source terminal that is coupled to the high power supply, and a drain terminal that is coupled to a tenth node;
a ninth transistor having a gate terminal that is coupled to an eleventh node, a source terminal that is coupled to the ninth node, and a drain terminal that is coupled to the sixth node;
a tenth transistor having a gate terminal that is coupled to the eleventh node, a source terminal that is coupled to the tenth node, and a drain terminal that is coupled to the eighth node;
an eleventh transistor having a gate terminal that is coupled to the fifth node, a source terminal that is coupled to the ninth node, and a drain terminal that is coupled to the fifth node;
a twelfth transistor having a gate terminal that is coupled to the fifth node, a source terminal that is coupled to the tenth node, and a drain terminal that is coupled to a twelfth node;
a floating current source that is coupled between the first node and the eighth node;
and
a resistive circuit that is coupled between the seventh node and the twelfth node, wherein the second and third nodes are arranged to operate as inputs to a class AB turn-around stage, and the seventh and twelfth nodes operate as drive points for an output of the class AB turn-around stage.

12 more elements