Differential amplifier having active load device scaling

Abstract

In a CMOS differential amplifier, first and second input transistors are matched in size to each other, and first and second load transistors are matched in size to each other. The first input transistor, a source follower transistor, and the first load transistor form one current branch of the differential structure while the second input transistor and second load transistor form another current branch of the differential structure. A first current source supplies current to both branches of the differential structure. An output transistor of the first conductivity type has its gate tied to the drain of the second load transistor. A second current source is coupled to the drain of the output transistor. A first source follower bias transistor of the first conductivity type is diode connected, and its drain is coupled to the source of a second source follower bias transistor of the first conductivity type that is also diode connected. The drain of the second source follower bias transistor is coupled to the gate of the source follower transistor. A third current source is coupled to the drain of the second source follower bias transistor. The ratio of the current from the third current source to the width-to-length ratio of the first source follower bias transistor is equal to a ratio of a current from the second current source divided by a width-to-length ratio of the output transistor; and a ratio of a current from the third current source to the width-to-length ratio of the second source follower bias transistor is equal to a ratio of half of a current from the first current source to the width-to-length ratio of the source follower transistor.

Dependencies are inferred from the claim text.