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US 6,583,652 B1Granted
Highly linear programmable transconductor with large input-signal range
AssigneeLattice Semiconductor Corporation
InventorsHans W. Klein, Jian Li, Paul Hildebrant
Life of this patent
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Abstract
An improved programmable transconductor can be efficiently implemented utilizing a programmable resistor circuit that allows for only a selected portion of the resistor circuit (associated with a desired transconductor gain) to be coupled between summing nodes of the transconductor. Additional switching circuits can be used to reduce gain errors associated with the switches used to implement the aforementioned solution. Additionally, the improved programmable transconductor can be integrated into fully differential programmable analog integrated circuits, thereby enhancing the performance of such integrated circuits.
Claims45
A programmable transconductor for generating a differential current between first and second current output terminals responsive to a differential voltage applied between first and second voltage input terminals, comprising:
- a first summing node;
- a first feedback node;
- a second summing node;
- a second feedback node;
- a resistor circuit including a plurality of resistors connected in series and defining a plurality of intermediate nodes, respective ones of the plurality of intermediate nodes being located between adjacent resistors of the plurality of resistors, wherein the programmable transconductor is configured to selectively couple at least one of the plurality of resistors between the first summing node and the second summing node and to leave remaining ones of the plurality of resistors uncoupled from the first summing node and the second summing node;
- a switch circuit coupled between a first one of the plurality of intermediate nodes and one of:
- the first summing node and the second summing node;
- a first input circuit, coupled to the first summing node and the first voltage input terminal, the first input circuit biasing the first summing node to a suitable voltage so as to bias the first feedback node to a voltage substantially equal to a voltage applied to the first voltage input terminal;
- and
- a second input circuit, coupled to the second summing node and the second voltage input terminal, the second input circuit biasing the second summing node to a suitable voltage so as to bias the second feedback node to a voltage substantially equal to a voltage applied to the second voltage input terminal.
7 more elements
A programmable analog integrated circuit for receiving a differential analog input signal and providing a processed differential analog output signal, the programmable analog circuit comprising:
- a first programmable analog circuit block, the first programmable analog circuit block having first analog circuit block positive and negative input terminals and first analog circuit block positive and negative output terminals, and including:
- a programmable transconductor for generating a differential current between first and second current output terminals responsive to a differential voltage applied between first and second voltage input terminals, comprising:
- a first summing node;
- a first feedback node;
- a second summing node;
- a second feedback node;
- a resistor circuit including a plurality of resistors connected in series and defining a plurality of intermediate nodes, respective ones of the plurality of intermediate nodes being located between adjacent resistors of the plurality of resistors, wherein the programmable transconductor is configured to selectively couple at least one of the plurality of resistors between the first summing node and the second summing node and to leave remaining ones of the plurality of resistors uncoupled from the first summing node and the second summing node;
- a switch circuit coupled between a first one of the plurality of intermediate nodes and one of:
- the first summing node and the second summing node;
- a first input circuit, coupled to the first summing node and the first voltage input terminal, the first input circuit biasing the first summing node to a suitable voltage so as to bias the first feedback node to a voltage substantially equal to a voltage applied to the first voltage input terminal;
- and
- a second input circuit, coupled to the second summing node and the second voltage input terminal, the second input circuit biasing the second summing node to a suitable voltage so as to bias the second feedback node to a voltage substantially equal to a voltage applied to the second voltage input terminal;
- and
- an analog routing pool, the analog routing pool controlling the routing of the differential analog input signal and signals provided by and to the first programmable analog circuit block, the analog routing pool being programmable.
11 more elements
A programmable transconductor for generating a differential current between first and second current output terminals responsive to a differential voltage applied between first and second voltage input terminals, comprising:
- a first summing node;
- a first feedback node;
- a second summing node;
- a second feedback node;
- a current source circuit configured to deliver a current to each of the first summing node and the second summing node;
- a resistor circuit including a plurality of resistors connected in series and defining a plurality of intermediate nodes, respective ones of the plurality of intermediate nodes being located between adjacent resistors of the plurality of resistors, wherein the programmable transconductor is configured to selectively couple at least one of the plurality of resistors between the first summing node and the second summing node and to leave remaining ones of the plurality of resistors uncoupled from the first summing node and the second summing node;
- a first plurality of switch circuits, each having a first terminal coupled to a corresponding intermediate node of the resistor circuit, and each further having a second terminal coupled to the first summing node;
- a second plurality of switch circuits, each having a first terminal coupled to a corresponding intermediate node of the resistor circuit, and each further having a second terminal coupled to the second summing node;
- a third plurality of switch circuits, each having a first terminal coupled to a corresponding intermediate node of the resistor circuit, and each further having a second terminal coupled to the first feedback node;
- a fourth plurality of switch circuits, each having a first terminal coupled to a corresponding intermediate node of the resistor circuit, and each further having a second terminal coupled to the second feedback node;
- a first gain block having a first input coupled to the first voltage input terminal, a second input coupled to the first feedback node, and an output;
- a first transistor having a first current-handling terminal coupled to the first summing node, a second current-handling terminal coupled to the first current output terminal, and a control terminal coupled to the output of the first gain block;
- a second gain block having a first input coupled to the second voltage input terminal, a second input coupled to the second feedback node, and an output;
- and
- a second transistor having a first current-handling terminal coupled to the second summing node, a second current-handling terminal coupled to the second current output terminal, and a control terminal coupled to the output of the second gain block.
12 more elements
Dependencies are inferred from the claim text.