US 6,583,488 B1 · Low density, tensile stress reducing material for STI trench fill

Abstract

A method of isolation of active regions on a silicon-on-insulator semiconductor device, including the steps of: providing a silicon-on-insulator semiconductor wafer having a silicon active layer, a dielectric isolation layer and a silicon substrate, in which the silicon active layer is formed on the dielectric isolation layer and the dielectric isolation layer is formed on the silicon substrate; etching through the silicon active layer to form an isolation trench, the isolation trench defining an active region in the silicon active layer; forming a liner oxide by oxidation of exposed silicon in the isolation trench; and filling the isolation trench with a tensile stress-reducing low density trench isolation material, without thereafter densifying the tensile stress-reducing low density trench isolation material.

Claims15

Dependent claims

A silicon-on-insulator semiconductor device, comprising:

a silicon-on-insulator wafer having a monocrystalline silicon active layer, a dielectric isolation layer, a silicon substrate, and at least one isolation trench defining an active region in the silicon active layer, in which the silicon active layer is formed on the dielectric isolation layer and the dielectric isolation layer is formed on the silicon substrate;
wherein the at least one isolation trench is filled with a tensile stress-reducing low density silicon dioxide trench isolation material which comprises spacers comprising a dielectric gas.

Dependencies are inferred from the claim text.

Low density, tensile stress reducing material for STI trench fill

Life of this patent

Low density, tensile stress reducing material for STI trench fill

Life of this patent

Abstract

Claims15