Semiconductor devices containing surface channel mos transistors
AssigneeMicron Technology, Inc.
InventorsMichael P. Violette, Jigish Trivedi
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Abstract
An intermediate semiconductor device for use in making surface channel MOS transistors is disclosed. The intermediate semiconductor device includes a semiconductor substrate having a top surface, a bottom surface, a plurality of doped isolation regions and a first surface channel. A first dielectric layer overlies a first portion of the top surface of the semiconductor substrate and a portion of at least one of the plurality of doped isolation regions. A first polysilicon layer overlies the first dielectric layer, and a second dielectric layer overlies the first polysilicon layer and a second portion of the top surface of the semiconductor substrate. The second dielectric layer is overlaid with a second polysilicon layer.
Claims7
An intermediate semiconductor structure comprising:
- a semiconductor substrate having a top surface and a bottom surface;
- a plurality of doped isolation regions;
- a first dielectric layer overlying a first portion of said top surface of said semiconductor substrate;
- said first dielectric layer further overlying a portion of at least one doped isolation region of said plurality of doped isolation regions;
- a first polysilicon layer overlying said first dielectric layer;
- a second dielectric layer overlying said first polysilicon layer and a second portion of said top surface of said semiconductor substrate;
- a second polysilicon layer overlying said second dielectric layer and
- a first surface channel, wherein a first end of said first dielectric layer does not overlie at least one doped isolation region.
Dependencies are inferred from the claim text.