Semiconductor device having first and second insulating films
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Hideomi Suzawa, Hirokazu Yamagata
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Abstract
In order to increase an aperture ratio, a part of or all of a gate electrode that overlaps with channel formation regions (213, 214) of a pixel TFT is caused to overlap with second wirings (source line or drain line) (154, 157). Additionally, a first interlayer insulating film (149) and a second interlayer insulating film (150c) are disposed between the gate electrode and the second wirings (154, 157) so as to decrease a parasitic capacitance.
Claims34
A semiconductor device comprising:
- a substrate;
- at least one thin film transistor formed over said substrate, said thin film transistor having at least one gate electrode and a gate insulating film;
- a first interlayer insulating film formed over said thin film transistor;
- a second interlayer insulating film formed on a part of said first interlayer insulating film;
- a conductive layer formed on said second interlayer insulating film;
- and
- a contact hole formed through the gate insulating film and said first interlayer insulating film without being formed through said second interlayer insulating film;
- wherein said conductive layer is contacted to an impurity region of the thin film transistor through said contact hole;
- and
- wherein said conductive layer overlaps with said gate electrode with said first and second interlayer insulating films interposed therebetween.
A semiconductor device comprising:
- a substrate;
- at least one thin film transistor formed over said substrate, said thin film transistor having at least one gate electrode and a gate insulating film;
- a first interlayer insulating film formed over said thin film transistor;
- a second interlayer insulating film formed on a part of said first interlayer insulating film;
- wherein the gate insulating film and said first interlayer insulating film extend beyond a side edge of said second interlayer insulating film;
- a conductive layer formed on said second interlayer insulating film;
- and
- a contact hole formed through said gate insulating film and said first interlayer insulating film;
- wherein said contact hole is formed in the extending portion of said gate insulating film and said first interlayer insulating film;
- wherein said conductive layer contacts with an impurity region of the thin film transistor through said contact hole;
- and
- wherein said conductive layer overlaps said gate electrode with said first and second interlayer insulating films interposed therebetween.
A semiconductor device comprising:
- a substrate;
- at least one thin film transistor formed over said substrate, said thin film transistor having at least one gate electrode;
- a first interlayer insulating film formed over said thin film transistor;
- a conductive layer formed over said first interlayer insulating film and connected to an impurity region of said thin film transistor;
- a second interlayer insulating film formed over said conductive layer, said second interlayer insulating film having a contact hole;
- and
- a pixel electrode formed over said second interlayer insulating film connected to said conductive layer through the contact hole,
- wherein said conductive layer overlaps said at least one gate electrode, and said contact hole overlaps said at least one gate electrode.
A semiconductor device comprising:
- a substrate;
- at least one thin film transistor formed over said substrate, said thin film transistor having at least one gate electrode;
- a first interlayer insulating film formed over said thin film transistor;
- a conductive layer formed over said first interlayer insulating film and connected to an impurity region of said thin film transistor;
- a second interlayer insulating film formed over said conductive layer, said second interlayer insulating film having a contact hole;
- and
- a pixel electrode formed over said second interlayer insulating film connected to said conductive layer through the contact hole,
- wherein said conductive layer overlaps said at least one gate electrode, and said contact hole is located on an overlapping portion of the conductive layer.
Dependencies are inferred from the claim text.