Dual depth trench isolation
AssigneeMicron Technology, Inc.
InventorJigish Trivedi
Life of this patent
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AssigneeMicron Technology, Inc.
InventorJigish Trivedi
Estimating the term…
A dual depth trench isolation structure formed between active devices and conductive well regions of same conductivity type which comprises a first inter-well isolation structure having a first isolation trench depth, a second inter-well isolation structure having a second isolation trench depth which combine to form a dual depth trench containing the dual depth trench isolation structure comprising the first inter-well isolation structure and the second inter-well isolation structure, with the dual depth trench isolation interposed at the boundary of an n-well conductive region and a p-well conductive region, a first intra-well isolation structure having a first isolation trench depth, the first intra-well isolation structure interposed between a pair of p-channel transistors residing in the n-well region, and a second intra-well isolation structure having a second isolation trench depth, the second intra-well isolation structure interposed between a pair of n-channel transistors residing in the p-well region.
A process for forming trench isolation in a semiconductor memory device, said process comprising the steps of:
A process for forming trench isolation in a semiconductor memory device, said process comprising the steps of:
Dependencies are inferred from the claim text.