Method of fabricating a semiconductor device having reduced contact resistance

The method of fabricating a semiconductor device having a silicon substrate having an active region and an isolation region, comprising the steps of:

• sequentially forming a gate oxide layer and a gate electrode on the active region of the silicon substrate;
• forming a junction region in the silicon substrate under each lateral side of the gate electrode;
• sequentially forming a nitride layer and an oxide layer on the silicon substrate;
• forming a continuous contact hole exposing the junction region by selectively removing a portion of the oxide layer, a portion of the nitride layer, and a portion of the junction region to form a continuous contact hole therethrough, wherein the size of the contact hole formed in the junction region is larger than the size of the contact hole formed in the oxide layer or the nitride layer;
• sequentially forming a thin metal layer and a buffer layer on the surfaces of the contact hole;
• and
• allowing silicidation between the thin metal layer, formed on the selectively removed portion of the junction region, and an upper portion of the junction region by performing a rapid thermal annealing process.