Method of manufacturing an amorphized barrier layer for integrated circuit interconnects
AssigneeAdvanced Micro Devices, Inc.
InventorsSergey D. Lopatin, Minh Van Ngo, Minh Quoc Tran
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Abstract
A manufacturing method for an integrated circuit is provided having a semiconductor substrate with a semiconductor device. A dielectric layer is on the semiconductor substrate and has an opening provided therein. An amorphized barrier layer lines the opening and a seed layer is deposited to line the amorphized barrier layer. A conductor core fills the opening over the barrier layer to form a conductor channel. The seed layer is securely bonded to the amorphized barrier layer and prevents electromigration along the surface between the seed and barrier layers.
Claims10
A method of manufacturing an integrated circuit comprising the steps of:
- providing a semiconductor substrate having a semiconductor device provided thereon;
- forming a dielectric layer on the semiconductor substrate;
- forming a opening in the dielectric layer;
- depositing a barrier layer to line the opening;
- amorphizing the barrier layer to form an amorphized barrier layer;
- depositing a seed layer on the amorphized barrier layer;
- depositing a conductor layer over the seed layer to fill the opening and connect to the semiconductor device;
- and
- planarizing the conductor, seed, and amorphized barrier layers to be coplanar with the dielectric layer to form a conductor channel therein.
A method of manufacturing an integrated circuit comprising the steps of:
- providing a silicon substrate having a semiconductor device provided thereon;
- depositing an oxide layer on the silicon substrate;
- forming a opening in the oxide layer;
- depositing a barrier layer to line the opening;
- amorphizing the barrier layer to form an amorphized barrier layer;
- depositing a seed layer on the amorphized barrier layer;
- electroplating a conductor layer using the seed layer to fill the opening and connect to the semiconductor device;
- and
- chemical-mechanical polishing the conductor, seed, and amorphized barrier layers to be coplanar with the dielectric layer to form a conductor channel therein.
Dependencies are inferred from the claim text.