Electro luminescence display device

An electronic device comprising:

• a first FET comprising a plurality of FETs connected in series with each other;
• a second FET having at least one gate electrode electrically connected to a drain wiring line of said first FET;
• a light-emitting device electrically connected to a drain wiring line of said second FET;
• wherein said second FET includes an LDD region comprising single crystal semiconductor provided such that a part or all thereof overlaps with said gate electrode with a gate insulating film interposed therebetween.

An electronic device having a pixel portion and a driving circuit portion,

• said driving circuit comprising an n-channel FET having an LDD region provided to overlap with a gate electrode with a gate insulating film interposed therebetween;
• and
• said pixel portion comprising a first FET, a second FET, and a light-emitting device electrically connected to said second FET,
• wherein said second FET having an LDD region comprising a single crystal semiconductor provided such that a part or all thereof overlaps with a gate electrode with a gate insulating film therebetween.

An electronic device having a pixel portion and a driving circuit portion,

• said driving circuit portion comprising an n-channel FET having an LDD region provided to overlap with a gate electrode with a gate insulating film interposed therebetween;
• and
• said pixel portion comprising a first FET, a second FET, and a light-emitting device electrically connected to said second FET,
• wherein said first FET having a plurality of FETs connected in series with each other,
• wherein said second FET having an LDD region comprising a single crystal semiconductor provided such that a part or all thereof overlaps with a gate electrode with a gate insulating film interposed therebetween.

An electronic device having at least a first FET and a second FET on a semiconductor substrate,

• said first FET comprising:
• first source and drain regions and a first channel region interposed therebetween formed in said semiconductor substrate;
• and
• a first gate electrode formed over said first channel region with a first gate insulating film interposed therebetween, and
• said second FET comprising:
• second source and drain regions and a second channel region interposed therebetween formed in said semiconductor substrate;
• and
• a second gate electrode formed over said second channel region with a second gate insulating film interposed therebetween, said second gate electrode electrically connected to said first drain region, and
• wherein a light-emitting device is electrically connected to said second drain region,
• wherein at least one LDD region is formed in said semiconductor substrate so that a part or all of said LDD region overlaps said second gate electrode with said second gate insulating film interposed therebetween.

An EL display device comprising:

• a first FET including first source and drain regions and a first channel region interposed therebetween formed in a single crystalline semiconductor substrate, and a first gate electrode formed over said first channel region with a first gate insulating film interposed therebetween;
• a second FET including second source and drain regions and a second channel region interposed therebetween formed in said single crystalline semiconductor substrate, and a second gate electrode formed over said second channel region with a second gate insulating film interposed therebetween,
• a light-emitting element electrically connected to said second FET,
• wherein said second FET is electrically connected to said first FET.

An EL display device comprising:

• a first FET including first source and drain regions and a first channel region interposed therebetween formed in a single crystalline semiconductor substrate, and a first gate electrode formed over said first channel region with a first gate insulating film interposed therebetween;
• a second FET including second source and drain regions and a second channel region interposed therebetween formed in said single crystalline semiconductor substrate, and a second gate electrode formed over said second channel region with a second gate insulating film interposed therebetween;
• and
• a light-emitting element electrically connected to said second FET,
• wherein said second FET is electrically connected to said first FET,
• wherein at least one LDD region is formed in said semiconductor substrate so that a part or all of said LDD region overlaps said second gate electrode with said second gate insulating film interposed therebetween.