Testing method and apparatus assuring semiconductor device quality and reliability

A method of testing a semiconductor integrated circuit device comprising the step of:

• measuring at least one electrical characteristic of the integrated circuit device outside a normal operating range of the semiconductor integrated circuit device, said step of measuring including
• measuring a high voltage quiescent leakage current at a high power supply voltage higher than a rated maximum operating power supply voltage;
• failing the semiconductor integrated circuit device if said measured high voltage quiescent leakage current exceeds a first predetermined amount;
• measuring a low voltage quiescent leakage current at a low power supply voltage lower than a rated minimum operating power supply voltage;
• and
• failing the semiconductor integrated circuit device fails if said measured low voltage quiescent leakage current exceeds a second predetermined amount.

A method of testing a semiconductor integrated circuit device, said semiconductor integrated circuit device including a test circuit having a input circuit with a data input and a clock input, a critical delay path circuit with an input connected to the input circuit and an output, and a output circuit with an input connected to the output of said critical delay path circuit and a clock input, said method comprising the step of:

• measuring at least one electrical characteristic of the integrated circuit device outside a normal operating range of the semiconductor integrated circuit device, said step of measuring including
• supplying data from a data circuit to said input of said test circuit and a first slow clock,
• supplying a burst of a second fast clock faster than said first slow clock to said test circuit, and
• checking the effectiveness of critical delay path circuit.