Method and apparatus for double-sampling a signal
AssigneeUniversity of Washington
InventorsDouglas R. Beck, David J. Allstot
Life of this patent
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Abstract
Methods and apparatuses for double-sampling a signal using an operational amplifier having dedicated unswitched connections to sample and hold circuits. In one embodiment, a circuit according to the teachings of the present invention includes an op-amp having four input terminals. Two of the input terminals are tied to ground and the other two terminals are coupled to S/H circuits through unswitched connections. In one embodiment, the S/H circuits are coupled to sample an input signal during different clock phases.
Claims27
A circuit, comprising:
- an operational amplifier (op-amp) having first, second, third and fourth input terminals, the third and fourth input terminals of the op-amp coupled to a first potential;
- and
- first and second sample and hold (S/H) circuits coupled to receive and sample an input signal, the first and second S/H circuits each having an output terminal coupled to the first and second input terminals, respectively, of the op-amp, the op-amp coupled to alternatingly evaluate the sampled input signals through unswitched connections between the first and second S/H circuits and the op-amp, the first S/H circuit coupled to sample the input signal while the second S/H circuit is evaluated by the op-amp, the second S/H circuit coupled to sample the input signal while the first S/H circuit is evaluated by the op-amp.
A method, comprising:
- sampling a signal with a first sample and hold (S/H) circuit during a first phase of an oscillating clock signal;
- evaluating the first S/H circuit through a first unswitched connection between the first S/H circuit and a first input terminal of an operational amplifier (op-amp) during a second phase of the oscillating clock signal;
- sampling the signal with a second S/H circuit during the second phase of the oscillating clock signal;
- evaluating the second S/H circuit through a second unswitched connection between the second S/H circuit and a second input terminal of the op-amp during the first phase of the oscillating clock signal;
- discharging the first unswitched connection to ground during the second phase of the oscillating clock signal;
- and
- discharging the second unswitched connection to ground during the first of the oscillating clock signal.
A circuit, comprising:
- a first switched capacitor circuit coupled to sample an input signal during a first phase of an oscillating clock signal;
- a second switched capacitor circuit coupled to sample the input signal during a second phase of the oscillating clock signal;
- and
- an operational amplifier (op-amp) having a first input coupled to the first switched capacitor circuit through a first unswitched connection between the op-amp and the first switched capacitor circuit, the op-amp further having a second input coupled to the second switched capacitor circuit through a second unswitched connection between the op-amp and the second switched capacitor circuit, the op-amp coupled to the evaluate the first switched capacitor circuit during the second phase of the oscillating clock signal, the op-amp coupled to the evaluate the second switched capacitor circuit during the first phase of the oscillating clock signal.
The circuit of 22 wherein the op-amp comprises a plurality of input transistors, the plurality of transistors including a first input transistor having a control terminal coupled to the first unswitched connection between the op-amp and the first switched capacitor circuit, the plurality of transistors including a second input transistor having a control terminal coupled to the second unswitched connection between the op-amp and the second switched capacitor circuit.
Dependencies are inferred from the claim text.