Method for apparatus for tracking errors in a memory system
AssigneeMadrone Solutions, Inc.
InventorsMichael L. Longwell, William Daune Atwell, Jeffrey Van Myers
Life of this patent
Estimating the term…
Abstract
A method for tracking errors in a memory system by detecting an error in a bit of a word accessed in the memory and maintaining an error history comprising a record of each of the detected errors. The error history information may be used to configure the memory, such as to add redundancy; or may be used to adjust operating parameters of the memory, such as the periodicity of refresh and/or scrub operations; or may be used to trigger a sensing operation of other parameters in an application system. In one embodiment, a counter increments each time an error is detected and decrements when no error is detected, thereby tracking error patterns.
Claims19
In a memory system having a memory for storing a plurality of words, each comprising a plurality of bits, an error detection and tracking circuit comprising:
- an error detection circuit connected to the memory to detect an error in a bit of a word accessed in the memory;
- and
- a tracking unit connected to the error detection circuit, wherein the tracking unit:
- maintains an error history comprising:
- a record of each word accessed in said memory in which an error is detected;
- and
- a record of each word accessed in said memory in which no error is detected;
- and
- periodically discards the oldest of said records in said error history.
An error detection and tracking circuit for use in a memory system having a memory for storing a plurality of words, each comprising a plurality of bits, said memory further comprising a selectively enabled redundant bit, the circuit comprising:
- an error detection circuit connected to the memory to detect an error in a bit of a word accessed in the memory;
- a tracking unit connected to the error detection circuit, wherein the tracking unit maintains an error history comprising a record of each said detected errors;
- and
- a control circuit connected to the tracking unit and to the memory, to control the operation of said memory as a function of said error history;
- and
- wherein the control circuit selectively enables said redundant bit as a function of the error history.
An error detection and tracking circuit for use in a memory system having a memory for storing a plurality of words, each comprising a plurality of bits, said memory further comprising a selectively enabled sensor, the circuit comprising:
- an error detection circuit connected to the memory to detect an error in a bit of a word accessed in the memory;
- a tracking unit connected to the error detection circuit, wherein the tracking unit maintains an error history comprising a record of each said detected errors;
- and
- a control circuit connected to the tracking unit and to the memory, to control the operation of said memory as a function of said error history;
- and
- wherein the control circuit selectively enables said sensor as a function of the error history.
An error detection and tracking circuit for use in a memory system having a memory for storing a plurality of words, each comprising a plurality of bits, the circuit comprising:
- an error detection circuit connected to the memory to detect an error in a bit of a word accessed in the memory;
- a tracking unit connected to the error detection circuit, wherein the tracking unit maintains an error history comprising a record of each said detected errors;
- a memory controller connected to the memory, the error detection circuit and the tracking unit, to control an access to the memory during an access cycle, at least one parameter of which is controllable;
- and
- a control circuit connected to the tracking unit and to the memory controller, to control the operation of said memory controller as a function of said error history;
- and
- wherein the control circuit controls said parameter as a function of the error history.
An error detection and tracking circuit for use in a memory system having a memory for storing a plurality of words, each comprising a plurality of bits, the circuit comprising:
- an error detection circuit connected to the memory to detect an error in a bit of a word accessed in the memory;
- a tracking unit connected to the error detection circuit, wherein the tracking unit maintains an error history comprising a record of each said detected errors;
- and
- a control circuit connected to the tracking unit and to the memory, to control the operation of said memory as a function of said error history;
- and
- wherein the control circuit selectively disables a selected portion of the memory as a function of the error history.
A method for tracking errors in a memory system having a memory for storing a plurality of words, each comprising a plurality of bits, the method comprising the steps of:
- detecting an error in a bit of a word accessed in the memory;
- maintaining an error history comprising a record of each of said detected errors;
- and
- selectively enabling a redundant bit in the memory as a function of the error history.
A method for tracking errors in a memory system having a memory for storing a plurality of words, each comprising a plurality of bits, the method comprising the steps of:
- detecting an error in a bit of a word accessed in the memory;
- maintaining an error history comprising a record of each of said detected errors;
- and
- selectively controlling a parameter of an access cycle to the memory as a function of the error history.
A method for tracking errors in a memory system having a memory for storing a plurality of words, each comprising a plurality of bits, the method comprising the steps of:
- detecting an error in a bit of a word accessed in the memory;
- maintaining an error history comprising a record of each of said detected errors;
- and
- selectively disabling a selected portion of the memory as a function of the error history.
A method for tracking errors in a memory system having a memory for storing a plurality of words, each comprising a plurality of bits, the method comprising the steps of:
- detecting an error in a bit of a word accessed in the memory;
- maintaining an error history comprising a record of each of said detected errors;
- and
- selectively enabling a sensor as a function of the error history.
A method for tracking errors in a memory system having a memory for storing a plurality of words, each comprising a plurality of bits, the method comprising the steps of:
- detecting an error in a bit of a word accessed in the memory;
- maintaining an error history comprising a record of each of said detected errors;
- controlling the operation of said memory as a function of said error history;
- and
- periodically discarding the oldest of said records so that the error history comprises the records of only those detected errors recorded during a current tracking window.
Dependencies are inferred from the claim text.