Method and apparatus for measuring on-wafer lumped capacitances in integrated circuits

A method for determining complex impedances of devices in an integrated circuit chip comprising the steps of:

• selecting a first device;
• selecting a first complex impedance term associated with the first device;
• fabricating a circuit on an integrated circuit chip, the circuit including the first device;
• deriving a mathematical model of the circuit which represents a theoretical frequency response of the circuit, the mathematical model including the first complex impedance term;
• determining the actual frequency response of the circuit;
• and
• fitting the actual frequency response to the theoretical frequency response, whereby the first complex impedance term is determined when the theoretical frequency response matches the actual frequency response wherein the step of determining the actual frequency response includes making a frequency measurement sweep of the circuit by applying an AC voltage input signal.

A method for determining complex impedances of devices in an integrated circuit comprising the steps of:

• (a) selecting a first device under test (DUT);
• (b) selecting a first instance of the DUT, the first instance of the DUT having a first set of physical dimensions;
• (c) fabricating a first circuit on a semiconductor wafer, the first circuit including the first instance of the DUT;
• (d) selecting a second instance of the DUT, the second instance of the DUT having a second set of physical dimensions;
• (e) fabricating a second circuit on the semiconductor wafer, the second circuit including the second instance of the DUT but otherwise being substantially identical to the first circuit;
• (f) deriving a mathematical model representing the first and second circuits, the model including complex impedance terms representative of the DUT;
• (g) making a frequency measurement sweep of the first circuit to produce a first actual frequency response plot;
• (h) making a frequency measurement sweep of the second circuit to produce a second actual frequency response plot;
• (i) fitting the mathematical model to the first actual frequency response plot, thereby producing a first fitted model corresponding to the first device;
• (j) fitting the mathematical model to the second actual frequency response plot, thereby producing a second fitted model corresponding to the second device;
• and
• (k) deriving a generalized model based on differences between the first and second fitted model and on differences between the first and second set of physical dimensions, whereby the generalized model represents the complex impedance terms of the DUT as a function of the physical dimensions of the DUT.

A method for determining lumped capacitances in an integrated circuit chip comprising the steps of:

• selecting a device, the device having a characteristic capacitance;
• fabricating a circuit on an integrated circuit chip, the circuit including a first instance of the device and at least one inductor;
• determining a first frequency response of the circuit based on a theoretical analysis of the circuit;
• making a frequency sweep of the circuit to obtain a second frequency response;
• and
• determining a capacitance value of the first device based on differences between the first and second frequency responses wherein the first and second frequency responses each is represented by S-parameter plots having peaks and valleys, and wherein the step of determining a capacitance value includes comparing the peaks and valleys of the S-parameter plots.

A method of determining lumped capacitances in an integrated circuit chip comprising the steps of:

• selecting a device under test (DUT);
• forming a first circuit on an integrated circuit chip, the first circuit having at least one inductive element and a first instance of the DUT;
• selecting a modification to a physical parameter of the DUT;
• forming a second circuit on the integrated circuit chip, the second circuit including a second instance of the DUT, the second instance of the DUT having the selected modification, the second circuit being substantially the same as the first circuit otherwise;
• determining a model representative of the frequency response of the first and second circuits;
• applying test signals to the first and second circuits to collect data representative of actual frequency responses of the circuits;
• and
• determining a mathematical relationship of the capacitance of the DUT as a function of its physical parameters, including:
• fitting the model to data corresponding to the first circuit;
• fitting the model to data corresponding to the second circuit;
• making an analysis of differences between the fitted models and of differences between the physical parameters of the first and second instances of the DUT to produce the mathematical relationship.