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US 6,557,061 B1Granted
Modem instructions sequentially alternating executions between sending a predetermined number of symbols by a transmit sequencer and receiving by a receive sequencer
AssigneeIntel Corporation
InventorsAmir Hindie, Karl Leinfelder
Life of this patent
Estimating the term…
Abstract
A modem is implemented using a host processor or DSP and has execution code for implementing respective receive and transmit functionality which execute without any branching. Coordination of receive and transmit functionality is achieved using state indications in a common data area. Operation without branching eliminates the need for machine cycles associated with branching.
Claims16
A modem, comprising:
- a processor with a memory system which stores instructions for an encoder, a transmit engine, a decoder, and a receive engine wherein said instructions comprise:
- sending to a device to which the modem is to communicate and batch processing, by a transmit sequencer of the transmit engine, a signal encoded by the encoder;
- halting the sending step at an occurrence of when the transmit sequencer sends a predetermined number of symbols that are samples converted from the signal;
- receiving from the device and batch processing, by a receive sequencer of the receive engine, the signal decoded by the decoder;
- and
- halting the receiving step at another occurrence of when the receive sequencer receives the predetermined number of said symbols.
3 more elements
A method of operating a modem, comprising:
- storing in a memory system of a processor instructions for an encoder, a transmit engine, a decoder, and a receive engine, wherein said instructions comprise:
- sending to a device to which the modem is to communicate and batch processing, by a transmit sequencer of the transmit engine, a signal encoded by the encoder;
- halting the sending step at an occurrence of when the transmit sequencer sends a predetermined number of symbols that are samples converted from the signal;
- receiving from the device and batch processing, by a receive sequencer of the receive engine, the signal decoded by the decoder;
- and
- halting the receiving step at another occurrence of when the receive sequencer receives the predetermined number of said symbols;
- and
- accessing from the memory system and executing, by the processor, said instructions for processing said signal.
5 more elements
Dependencies are inferred from the claim text.